northbridge/amd/amdfam10: Fix poor performance on Family 15h CPUs
Change-Id: I193749bc767b7c1139de7cd67622a7b03298009b Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12031 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -60,10 +60,10 @@ static void nb_control_init(struct device *dev)
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pci_write_config32(dev, 0xe0, dword);
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/* Configure northbridge P-states */
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dword = pci_read_config32(dev, 0xe0);
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dword = pci_read_config32(dev, 0x170);
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dword &= ~(0x7 << 9); /* NbPstateThreshold = compute_unit_count */
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dword |= (compute_unit_count & 0x7) << 9;
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pci_write_config32(dev, 0xe0, dword);
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pci_write_config32(dev, 0x170, dword);
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printk(BIOS_DEBUG, "done.\n");
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}
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@ -1755,6 +1755,8 @@ static void detect_and_enable_probe_filter(device_t dev)
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disable_cache();
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wbinvd();
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/* Enable probe filter */
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for (i = 0; i < sysconf.nodes; i++) {
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device_t f3x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3));
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@ -1771,6 +1773,25 @@ static void detect_and_enable_probe_filter(device_t dev)
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do {
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} while (!(pci_read_config32(f3x_dev, 0x1d4) & (0x1 << 19)));
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}
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if (is_fam15h()) {
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printk(BIOS_DEBUG, "Enabling ATM mode\n");
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/* Enable ATM mode */
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for (i = 0; i < sysconf.nodes; i++) {
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device_t f0x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 0));
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device_t f3x_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3));
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dword = pci_read_config32(f0x_dev, 0x68);
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dword |= (0x1 << 12); /* ATMModeEn = 1 */
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pci_write_config32(f0x_dev, 0x68, dword);
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dword = pci_read_config32(f3x_dev, 0x1b8);
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dword |= (0x1 << 27); /* L3ATMModeEn = 1 */
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pci_write_config32(f3x_dev, 0x1b8, dword);
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}
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}
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enable_cache();
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/* Reenable L3 and DRAM scrubbers */
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