mb/amd/chausie: increase RW_MRC_CACHE size in FMAP

On Sabrina SoCs the size of the APOB has increased, so the size of the
RW_MRC_CACHE FMAP sections needs to be increased in order for the data
to still fit in the corresponding FMAP partition.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib31b918aba90dd507b47aec9e1f75c138857cd02
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62155
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/amd/chausie/board.fmd

@@ -1,7 +1,7 @@
 FLASH@0xFF000000 16M {
 	BIOS {
 		EC 4K
-		RW_MRC_CACHE 64K
+		RW_MRC_CACHE 96K
 		FMAP 4K
 		COREBOOT(CBFS)
 	}

src/mainboard/amd/chausie/chromeos.fmd

@@ -1,7 +1,7 @@
 FLASH@0xFF000000 16M {
 	SI_BIOS {
 		EC 128K
-		RW_MRC_CACHE(PRESERVE) 64K
+		RW_MRC_CACHE(PRESERVE) 96K
 		RW_SECTION_A 3M {
 			VBLOCK_A 8K
 			FW_MAIN_A(CBFS)