mb/amd/chausie: increase RW_MRC_CACHE size in FMAP
On Sabrina SoCs the size of the APOB has increased, so the size of the RW_MRC_CACHE FMAP sections needs to be increased in order for the data to still fit in the corresponding FMAP partition. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib31b918aba90dd507b47aec9e1f75c138857cd02 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62155 Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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FLASH@0xFF000000 16M {
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FLASH@0xFF000000 16M {
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BIOS {
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BIOS {
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EC 4K
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EC 4K
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RW_MRC_CACHE 64K
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RW_MRC_CACHE 96K
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FMAP 4K
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FMAP 4K
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COREBOOT(CBFS)
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COREBOOT(CBFS)
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}
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}
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FLASH@0xFF000000 16M {
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FLASH@0xFF000000 16M {
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SI_BIOS {
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SI_BIOS {
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EC 128K
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EC 128K
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RW_MRC_CACHE(PRESERVE) 64K
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RW_MRC_CACHE(PRESERVE) 96K
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RW_SECTION_A 3M {
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RW_SECTION_A 3M {
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VBLOCK_A 8K
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VBLOCK_A 8K
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FW_MAIN_A(CBFS)
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FW_MAIN_A(CBFS)
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