mb/google/dedede/variants/drawcia: add DTT support

Add DTT (Dynamic Tuning Technology) support on Jasper Lake based drawcia
system. Add information on sensors, power limits and tcc_offset for DTT
based thermal control.

BRANCH=None
BUG=b:161993459
TEST=Built for dedede system

Change-Id: If50052864fb246a6a8f7d96fa50529e5f55968c0
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44148
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Sumeet R Pawnikar 2020-08-03 22:29:39 +05:30 committed by Karthik Ramasubramanian
parent 1ba3833ba3
commit 4dfdce4223
1 changed files with 43 additions and 0 deletions

View File

@ -39,7 +39,50 @@ chip soc/intel/jasperlake
}, },
}" }"
register "power_limits_config" = "{
.tdp_pl1_override = 6,
.tdp_pl2_override = 15,
}"
register "tcc_offset" = "20" # TCC of 85C
device domain 0 on device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf
register "options.tsr[0].desc" = ""Memory""
register "options.tsr[1].desc" = ""Ambient""
register "options.tsr[2].desc" = ""Charger""
register "options.tsr[3].desc" = ""5V regulator""
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 80, 1000)"
register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 4000)"
register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 1000)"
register "policies.passive[3]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 1000)"
register "policies.passive[4]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 60, 1000)"
register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 119, SHUTDOWN)"
register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 115, SHUTDOWN)"
register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 115, SHUTDOWN)"
register "policies.critical[3]" = "DPTF_CRITICAL(TEMP_SENSOR_2, 115, SHUTDOWN)"
register "policies.critical[4]" = "DPTF_CRITICAL(TEMP_SENSOR_3, 115, SHUTDOWN)"
register "controls.power_limits.pl1" = "{
.min_power = 4800,
.max_power = 6000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,}"
register "controls.power_limits.pl2" = "{
.min_power = 6000,
.max_power = 15000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 1000,}"
device generic 0 on end
end
end # SA Thermal device
device pci 14.0 on device pci 14.0 on
chip drivers/usb/acpi chip drivers/usb/acpi
device usb 0.0 on device usb 0.0 on