From 4dff4fe14e62137e909e10b9f45177442367e781 Mon Sep 17 00:00:00 2001 From: Rex-BC Chen Date: Fri, 12 Aug 2022 13:45:01 +0800 Subject: [PATCH] soc/mediatek/mt8188: Fix the order of register address in addressmap.h TEST=build pass BUG=b:236331724 Signed-off-by: Bo-Chen Chen Change-Id: Ie9d7b361dda8c5850bc0682c255bc20f9e26675c Reviewed-on: https://review.coreboot.org/c/coreboot/+/66668 Reviewed-by: Yidi Lin Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8188/include/soc/addressmap.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h index e117f749bb..fa773b4327 100644 --- a/src/soc/mediatek/mt8188/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h @@ -42,11 +42,11 @@ enum { I2C4_DMA_BASE = IO_PHYS + 0x00220380, I2C5_DMA_BASE = IO_PHYS + 0x00220480, I2C6_DMA_BASE = IO_PHYS + 0x00220600, - SCP_ADSP_CFG_BASE = IO_PHYS + 0x00720000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000, INFRA_TRACKER_BASE = IO_PHYS + 0x00314000, SSPM_SRAM_BASE = IO_PHYS + 0x00400000, SSPM_CFG_BASE = IO_PHYS + 0x00440000, + SCP_ADSP_CFG_BASE = IO_PHYS + 0x00720000, DPM_PM_SRAM_BASE = IO_PHYS + 0x00900000, DPM_DM_SRAM_BASE = IO_PHYS + 0x00920000, DPM_CFG_BASE = IO_PHYS + 0x00940000,