mb/google/poppy/variants/nami: Add gpio-keys ACPI node for PENH

Use gpio_keys driver to add ACPI node for pen eject event.  Also
setting gpio wake pin for wake events.

BUG=b:73121017
BRANCH=None
TEST=./util/abuild/abuild -p none -t google/poppy -x -a

Change-Id: I5d87d938ac3a4e52e676850b9d8b80e83726275d
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/25162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Shelley Chen 2018-03-14 11:19:24 -07:00 committed by Furquan Shaikh
parent 6a0eafefc4
commit 4e0b47a5ed
2 changed files with 14 additions and 4 deletions

View File

@ -279,9 +279,19 @@ chip soc/intel/skylake
register "generic.reset_delay_ms" = "20" register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1" register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1" register "generic.disable_gpio_export_in_crs" = "1"
register "generic.wake" = "GPE0_DW2_01"
register "hid_desc_reg_offset" = "0x1" register "hid_desc_reg_offset" = "0x1"
device i2c 0x9 on end device i2c 0x9 on end
end end
chip drivers/generic/gpio_keys
register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_E8)"
register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""pen_eject""
device generic 0 on end
end
end # I2C #2 end # I2C #2
device pci 15.3 on device pci 15.3 on
chip drivers/generic/max98357a chip drivers/generic/max98357a

View File

@ -211,8 +211,8 @@ static const struct pad_config gpio_table[] = {
/* E0 : SATAXPCI0 ==> H1_PCH_INT_ODL */ /* E0 : SATAXPCI0 ==> H1_PCH_INT_ODL */
PAD_CFG_GPI_APIC_INVERT(GPP_E0, NONE, PLTRST), PAD_CFG_GPI_APIC_INVERT(GPP_E0, NONE, PLTRST),
/* E1 : SATAXPCIE1 ==> SATA_GP1 */ /* E1 : SATAXPCIE1 ==> PEN_EJECT_ODL - for wake event */
PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), PAD_CFG_GPI_ACPI_SCI(GPP_E1, NONE, DEEP, NONE),
/* E2 : SATAXPCIE2 ==> NC(TP916) */ /* E2 : SATAXPCIE2 ==> NC(TP916) */
PAD_CFG_NC(GPP_E2), PAD_CFG_NC(GPP_E2),
/* E3 : CPU_GP0 ==> TRACKPAD_INT# */ /* E3 : CPU_GP0 ==> TRACKPAD_INT# */
@ -225,8 +225,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NC(GPP_E6), PAD_CFG_NC(GPP_E6),
/* E7 : CPU_GP1 ==> TOUCHSCREEN_INT# */ /* E7 : CPU_GP1 ==> TOUCHSCREEN_INT# */
PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST), PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST),
/* E8 : SATALED# ==> NC */ /* E8 : SATALED# ==> PEN_EJECT_ODL - for notification */
PAD_CFG_NC(GPP_E8), PAD_CFG_GPI_GPIO_DRIVER(GPP_E8, NONE, DEEP),
/* E9 : USB2_OCO# ==> USB_C0_OC# */ /* E9 : USB2_OCO# ==> USB_C0_OC# */
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
/* E10 : USB2_OC1# ==> USB_C1_OC# */ /* E10 : USB2_OC1# ==> USB_C1_OC# */