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CPU: Update ivybridge PP1 current limit value 

The BWG says ivybridge current limit for PP1 is 50A.

Verify the PP1 current limit value on link device:

> echo $(( ( $(rdmsr 0 0x602) & 0x1fff ) >> 3 ))
50

Change-Id: I946269d21ef605f2525fe03993f569d69128294b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1305
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Duncan Laurie 2012-06-25 09:53:58 -07:00 committed by Ronald G. Minnich
parent 77dbbac7e7
commit 4e4320f524
2 changed files with 6 additions and 2 deletions
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3
src/cpu/intel/model_206ax/model_206ax.h
View File

@ -75,7 +75,8 @@
#define MSR_PP0_CURRENT_CONFIG 0x601 #define MSR_PP0_CURRENT_CONFIG 0x601
#define PP0_CURRENT_LIMIT (112 << 3) /* 112 A */ #define PP0_CURRENT_LIMIT (112 << 3) /* 112 A */
#define MSR_PP1_CURRENT_CONFIG 0x602 #define MSR_PP1_CURRENT_CONFIG 0x602
#define PP1_CURRENT_LIMIT (35 << 3) /* 35 A */ #define PP1_CURRENT_LIMIT_SNB (35 << 3) /* 35 A */
#define PP1_CURRENT_LIMIT_IVB (50 << 3) /* 50 A */
#define MSR_PKG_POWER_SKU_UNIT 0x606 #define MSR_PKG_POWER_SKU_UNIT 0x606
#define MSR_PKG_POWER_SKU 0x614 #define MSR_PKG_POWER_SKU 0x614
#define MSR_PP0_POWER_LIMIT 0x638 #define MSR_PP0_POWER_LIMIT 0x638

5
src/cpu/intel/model_206ax/model_206ax_init.c
View File

@ -311,7 +311,10 @@ static void configure_c_states(void)
/* Secondary Plane Current Limit */ /* Secondary Plane Current Limit */
msr = rdmsr(MSR_PP1_CURRENT_CONFIG); msr = rdmsr(MSR_PP1_CURRENT_CONFIG);
msr.lo &= ~0x1fff; msr.lo &= ~0x1fff;
msr.lo |= PP1_CURRENT_LIMIT; if (cpuid_eax(1) >= 0x30600)
msr.lo |= PP1_CURRENT_LIMIT_IVB;
else
msr.lo |= PP1_CURRENT_LIMIT_SNB;
wrmsr(MSR_PP1_CURRENT_CONFIG, msr); wrmsr(MSR_PP1_CURRENT_CONFIG, msr);
} }