soc/amd/*/data_fabric: introduce and use DF_MMIO_REG_SET_SIZE

To be able to handle a special case, add a per-SoC define for
DF_MMIO_REG_SET_SIZE instead of having this hard-coded as 4 in the
DF_MMIO_* macros. To avoid some duplication, also introduce the
DF_MMIO_REG_OFFSET macro.

TEST=Output from data_fabric_print_mmio_conf doesn't change on Mandolin.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I67420a2973c8ef9a7f0ce19ddc0013de69731689
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>

src/soc/amd/cezanne/include/soc/data_fabric.h

@@ -11,6 +11,7 @@
 #define   D18F0_MMIO_SHIFT		16
 #define D18F0_MMIO_CTRL0		0x208
 
+#define DF_MMIO_REG_SET_SIZE		4
 #define DF_MMIO_REG_SET_COUNT		8
 
 #define DF_FICAA_BIOS			0x5C

src/soc/amd/common/block/include/amdblocks/data_fabric.h

@@ -11,10 +11,12 @@
 
 #define BROADCAST_FABRIC_ID		0xff
 
+#define DF_MMIO_REG_OFFSET(instance) ((instance) * DF_MMIO_REG_SET_SIZE * sizeof(uint32_t))
+
 /* The number of data fabric MMIO registers is SoC-specific */
-#define DF_MMIO_BASE(reg)		((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_BASE0)
-#define DF_MMIO_LIMIT(reg)		((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_LIMIT0)
-#define DF_MMIO_CONTROL(reg)		((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_CTRL0)
+#define DF_MMIO_BASE(reg)	(D18F0_MMIO_BASE0 + DF_MMIO_REG_OFFSET(reg))
+#define DF_MMIO_LIMIT(reg)	(D18F0_MMIO_LIMIT0 + DF_MMIO_REG_OFFSET(reg))
+#define DF_MMIO_CONTROL(reg)	(D18F0_MMIO_CTRL0 + DF_MMIO_REG_OFFSET(reg))
 
 uint32_t data_fabric_read32(uint8_t function, uint16_t reg, uint8_t instance_id);
 void data_fabric_write32(uint8_t function, uint16_t reg, uint8_t instance_id, uint32_t data);

src/soc/amd/glinda/include/soc/data_fabric.h

@@ -11,6 +11,7 @@
 #define   D18F0_MMIO_SHIFT		16
 #define D18F0_MMIO_CTRL0		0xD88
 
+#define DF_MMIO_REG_SET_SIZE		4
 #define DF_MMIO_REG_SET_COUNT		8
 
 #define DF_FICAA_BIOS			0x8C

src/soc/amd/mendocino/include/soc/data_fabric.h

@@ -11,6 +11,7 @@
 #define   D18F0_MMIO_SHIFT		16
 #define D18F0_MMIO_CTRL0		0x208
 
+#define DF_MMIO_REG_SET_SIZE		4
 #define DF_MMIO_REG_SET_COUNT		8
 
 #define DF_FICAA_BIOS			0x5C

src/soc/amd/phoenix/include/soc/data_fabric.h

@@ -11,6 +11,7 @@
 #define   D18F0_MMIO_SHIFT		16
 #define D18F0_MMIO_CTRL0		0xD88
 
+#define DF_MMIO_REG_SET_SIZE		4
 #define DF_MMIO_REG_SET_COUNT		8
 
 #define DF_FICAA_BIOS			0x8C

src/soc/amd/picasso/include/soc/data_fabric.h

@@ -11,6 +11,7 @@
 #define   D18F0_MMIO_SHIFT		16
 #define D18F0_MMIO_CTRL0		0x208
 
+#define DF_MMIO_REG_SET_SIZE		4
 #define DF_MMIO_REG_SET_COUNT		8
 
 #define DF_FICAA_BIOS			0x5C