From 4e86131462786f3a9898d90cfa1602b1e157bb5c Mon Sep 17 00:00:00 2001
From: Rob Barnes <robbarnes@google.com>
Date: Thu, 1 Oct 2020 15:16:39 -0600
Subject: [PATCH] mb/google/zork/dirinboz: Increase eMMC initial clock
 frequency

This will reduce boot time by 7ms. Some of the initial designs
don't have a pull-up resistor on the CMD line. These designs still boot
at 400 kHz despite not having the pull-up.

BUG=b:158766134
TEST=Boot dirinboz, run integrity test, b:169940185
BRANCH=zork

Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I6bac8284b67070ff2c5838257f4ae2ead0e69c22
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45934
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/zork/variants/dirinboz/overridetree.cb | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
index 905bc886e9..a11fa5e4c7 100644
--- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
@@ -36,6 +36,12 @@ chip soc/amd/picasso
 		.early_init = true,
 	}"
 
+	register "emmc_config" = "{
+		.timing = SD_EMMC_EMMC_HS400,
+		.sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A,
+		.init_khz_preset = 400,
+	}"
+
 	# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
 	device domain 0 on
 		subsystemid 0x1022 0x1510 inherit