soc/intel/alderlake: Add PCH ID 0x5181

List of changes:
1. Add new PCH ID 0x5181 into device/pci_ids.h
2. Update new PCH ID into common lpc.c
3. Add new PCH ID description into report_platform.c

TEST=Able to build and boot ADLRVP with new PCH ID.

Change-Id: I4343b7343876eb40c2955f6f4dd99d6446852dc0
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47474
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/device/pci_ids.h

@@ -2926,6 +2926,7 @@
 #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_29		0x7a1d
 #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30		0x7a1e
 #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31		0x7a1f
+#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32		0x5181
 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_0		0x7a80
 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_1		0x7a81
 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_2		0x7a82

src/soc/intel/alderlake/bootblock/report_platform.c

@@ -78,6 +78,7 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_ADP_P_ESPI_29, "Alderlake-P SKU" },
 	{ PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30, "Alderlake-P SKU" },
 	{ PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" },
+	{ PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32, "Alderlake-P SKU" },
 };
 
 static struct {

src/soc/intel/common/block/lpc/lpc.c

@@ -305,6 +305,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ADP_S_ESPI_29,
 	PCI_DEVICE_ID_INTEL_ADP_S_ESPI_30,
 	PCI_DEVICE_ID_INTEL_ADP_S_ESPI_31,
+	PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32,
 	0
 };