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northbridge/amd/amdfam10: Add Suspend to RAM (S3) Flash data storage area 

Change-Id: I169fafc3a61e11c3e4781190053e57bf34502d7b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11951
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Timothy Pearson 2015-09-05 18:39:34 -05:00 committed by Martin Roth
parent fce128cdfb
commit 4ea0cc087e
3 changed files with 51 additions and 22 deletions
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10
src/northbridge/amd/amdfam10/Kconfig
View File

@ -93,6 +93,16 @@ if DIMM_FBDIMM
default 0x0110
endif
config S3_DATA_SIZE
int
default 16384
depends on (HAVE_ACPI_RESUME)
config S3_DATA_POS
int
default 0
depends on (HAVE_ACPI_RESUME)
if DIMM_DDR2
if DIMM_REGISTERED
config DIMM_SUPPORT

13
src/northbridge/amd/amdfam10/Makefile.inc
View File

@ -15,4 +15,17 @@ ramstage-y += get_pci1234.c
# Call show_all_routes() anywhere amdfam10.h is included.
#ramstage-y += util.c
# Reserve 2x CONFIG_S3_DATA_SIZE to allow for random file placement
# (not respecting erase sector boundaries) within CBFS
$(obj)/coreboot_s3nv.rom: $(obj)/config.h
echo " S3 NVRAM $(CONFIG_S3_DATA_POS) (S3 storage area)"
# force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse)
printf %d $(CONFIG_S3_DATA_SIZE) | LC_ALL=C awk '{for (i=0; i<$$1*2; i++) {printf "%c", 255}}' > $@.tmp
mv $@.tmp $@
cbfs-files-$(CONFIG_HAVE_ACPI_RESUME) += s3nv
s3nv-file := $(obj)/coreboot_s3nv.rom
s3nv-align := $(CONFIG_S3_DATA_SIZE)
s3nv-type := raw
endif

50
src/northbridge/amd/amdfam10/raminit_amdmct.c
View File

@ -108,6 +108,10 @@ static uint16_t mct_MaxLoadFreq(uint8_t count, uint8_t registered, uint16_t freq
#include "../amdmct/mct_ddr3/mct_d.h"
#include "../amdmct/mct_ddr3/mct_d_gcc.h"
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
#include "../amdmct/mct_ddr3/s3utils.c"
#endif
#include "../amdmct/wrappers/mcti_d.c"
#include "../amdmct/mct_ddr3/mct_d.c"
@ -246,32 +250,34 @@ static void amdmct_cbmem_store_info(struct sys_info *sysinfo)
size_t i;
struct DCTStatStruc *pDCTstatA = NULL;
/* Allocate memory */
struct amdmct_memory_info* mem_info;
mem_info = cbmem_add(CBMEM_ID_AMDMCT_MEMINFO, sizeof(struct amdmct_memory_info));
if (!mem_info)
return;
if (!acpi_is_wakeup_s3()) {
/* Allocate memory */
struct amdmct_memory_info *mem_info;
mem_info = cbmem_add(CBMEM_ID_AMDMCT_MEMINFO, sizeof(struct amdmct_memory_info));
if (!mem_info)
return;
printk(BIOS_DEBUG, "%s: Storing AMDMCT configuration in CBMEM\n", __func__);
printk(BIOS_DEBUG, "%s: Storing AMDMCT configuration in CBMEM\n", __func__);
/* Initialize memory */
memset(mem_info, 0, sizeof(struct amdmct_memory_info));
/* Initialize memory */
memset(mem_info, 0, sizeof(struct amdmct_memory_info));
/* Copy data */
memcpy(&mem_info->mct_stat, &(sysinfo->MCTstat), sizeof(struct MCTStatStruc));
for (i = 0; i < MAX_NODES_SUPPORTED; i++) {
pDCTstatA = sysinfo->DCTstatA + i;
memcpy(&mem_info->dct_stat[i], pDCTstatA, sizeof(struct DCTStatStruc));
}
mem_info->ecc_enabled = mctGet_NVbits(NV_ECC_CAP);
mem_info->ecc_scrub_rate = mctGet_NVbits(NV_DramBKScrub);
/* Copy data */
memcpy(&mem_info->mct_stat, &sysinfo->MCTstat, sizeof(struct MCTStatStruc));
for (i = 0; i < MAX_NODES_SUPPORTED; i++) {
pDCTstatA = sysinfo->DCTstatA + i;
memcpy(&mem_info->dct_stat[i], pDCTstatA, sizeof(struct DCTStatStruc));
}
mem_info->ecc_enabled = mctGet_NVbits(NV_ECC_CAP);
mem_info->ecc_scrub_rate = mctGet_NVbits(NV_DramBKScrub);
/* Zero out invalid/unused pointers */
/* Zero out invalid/unused pointers */
#if IS_ENABLED(CONFIG_DIMM_DDR3)
for (i = 0; i < MAX_NODES_SUPPORTED; i++) {
mem_info->dct_stat[i].C_MCTPtr = NULL;
mem_info->dct_stat[i].C_DCTPtr[0] = NULL;
mem_info->dct_stat[i].C_DCTPtr[1] = NULL;
}
for (i = 0; i < MAX_NODES_SUPPORTED; i++) {
mem_info->dct_stat[i].C_MCTPtr = NULL;
mem_info->dct_stat[i].C_DCTPtr[0] = NULL;
mem_info->dct_stat[i].C_DCTPtr[1] = NULL;
}
#endif
}
}