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soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDs 

List of changes:
1. Add PEG60/10/62 IDs (0x464d/0x460d/0x463d) into device/pci_ids.h
2. Add these new IDs into pcie_device_ids[] in pcie.c

BUG=b:205668996
TEST=Build and check fsp log to confirm the settings are set properly.

Signed-off-by: Tracy Wu <tracy.wu@intel.corp-partner.google.com>
Change-Id: Idc8a09b0579e1e6053ed2e35b7556a180a5f0088
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Tracy Wu 2021-11-09 14:23:11 +08:00 committed by Paul Fagerburg
parent ff182cb237
commit 4eb17f8e20
2 changed files with 7 additions and 0 deletions
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4
src/include/device/pci_ids.h
View File

@ -3332,6 +3332,10 @@
#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP6 0x4b3d
#define PCI_DEVICE_ID_INTEL_MCC_PCIE_RP7 0x4b3e
#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP1 0x464d
#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP2 0x460d
#define PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP3 0x463d
#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP1 0x51b8
#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP2 0x51b9
#define PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP3 0x51ba

3
src/soc/intel/common/block/pcie/pcie.c
View File

@ -313,6 +313,9 @@ static const unsigned short pcie_device_ids[] = {
PCI_DEVICE_ID_INTEL_JSP_PCIE_RP6,
PCI_DEVICE_ID_INTEL_JSP_PCIE_RP7,
PCI_DEVICE_ID_INTEL_JSP_PCIE_RP8,
PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP1,
PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP2,
PCI_DEVICE_ID_INTEL_ADL_P_PCIE_RP3,
PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP1,
PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP2,
PCI_DEVICE_ID_INTEL_ADP_P_PCIE_RP3,