mb/asus/p2b*: Switch to overridetree

All variants will use the same lid/thermal-polarity config as a result,
which looks the same for all recently boot-tested variants anyway.

Change-Id: Iaaae4eae41ab0037e72375b255d9d1c3eca8d383
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39905
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Keith Hui 2020-03-28 21:54:17 -04:00 committed by Patrick Georgi
parent a48e711120
commit 4ec683d077
9 changed files with 43 additions and 188 deletions

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@ -56,9 +56,9 @@ config VARIANT_DIR
default "p2b-f" if BOARD_ASUS_P2B_F
default "p2b-ls" if BOARD_ASUS_P2B_LS
config DEVICETREE
config OVERRIDE_DEVICETREE
string
default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" if ! BOARD_ASUS_P2B
default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
config IRQ_SLOT_COUNT
int

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@ -37,10 +37,6 @@ chip northbridge/intel/i440bx # Northbridge
end
device pnp 3f0.8 on # GPIO 2
end
device pnp 3f0.9 on # GPIO 3
end
device pnp 3f0.a on # ACPI
end
end
end
device pci 4.1 on end # IDE
@ -56,7 +52,6 @@ chip northbridge/intel/i440bx # Northbridge
register "ide1_drive1_udma33_enable" = "0"
register "thrm_polarity" = "1"
register "lid_polarity" = "1"
register "gpo" = "0x7fffbbff"
end
end
end

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@ -8,47 +8,15 @@ chip northbridge/intel/i440bx # Northbridge
end
end
device domain 0 on # PCI domain
device pci 0.0 on end # Host bridge
device pci 1.0 on end # PCI/AGP bridge
chip southbridge/intel/i82371eb # Southbridge
device pci 4.0 on # ISA bridge
chip superio/winbond/w83977tf # Super I/O
device pnp 3f0.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 3f0.1 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 3f0.2 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 3f0.3 on # COM2 / IR
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 3f0.5 on # PS/2 keyboard / mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1 # PS/2 keyboard interrupt
irq 0x72 = 12 # PS/2 mouse interrupt
end
device pnp 3f0.7 on # GPIO 1
end
device pnp 3f0.8 on # GPIO 2
end
device pnp 3f0.9 on # GPIO 3
end
device pnp 3f0.a on # ACPI
end
end
end
device pci 4.1 on end # IDE
device pci 4.2 on end # USB
device pci 4.3 on end # ACPI
register "ide0_enable" = "1"
register "ide1_enable" = "1"
register "ide_legacy_enable" = "1"

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@ -8,47 +8,15 @@ chip northbridge/intel/i440bx # Northbridge
end
end
device domain 0 on # PCI domain
device pci 0.0 on end # Host bridge
device pci 1.0 on end # PCI/AGP bridge
chip southbridge/intel/i82371eb # Southbridge
device pci 4.0 on # ISA bridge
chip superio/winbond/w83977tf # Super I/O
device pnp 3f0.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 3f0.1 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 3f0.2 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 3f0.3 on # COM2 / IR
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 3f0.5 on # PS/2 keyboard / mouse
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1 # PS/2 keyboard interrupt
irq 0x72 = 12 # PS/2 mouse interrupt
end
device pnp 3f0.7 on # GPIO 1
end
device pnp 3f0.8 on # GPIO 2
end
device pnp 3f0.9 on # GPIO 3
end
device pnp 3f0.a on # ACPI
end
end
end
device pci 4.1 on end # IDE
device pci 4.2 on end # USB
device pci 4.3 on end # ACPI
device pci 6.0 on end # Onboard SCSI
register "ide0_enable" = "1"
register "ide1_enable" = "1"

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@ -1,59 +0,0 @@
chip northbridge/intel/i440bx # Northbridge
device cpu_cluster 0 on # APIC cluster
chip cpu/intel/slot_1 # CPU
device lapic 0 on end # APIC
end
end
device domain 0 on # PCI domain
device pci 0.0 on end # Host bridge
device pci 1.0 on end # PCI/AGP bridge
chip southbridge/intel/i82371eb # Southbridge
device pci 4.0 on # ISA bridge
chip superio/winbond/w83977tf # Super I/O (FIXME: It's W83977EF!)
device pnp 3f0.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 3f0.1 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 3f0.2 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 3f0.3 on # COM2 / IR
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 3f0.5 on # PS/2 keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1 # PS/2 keyboard interrupt
irq 0x72 = 12 # PS/2 mouse interrupt
end
device pnp 3f0.6 on # Consumer IR
end
device pnp 3f0.7 on # GPIO 1
end
device pnp 3f0.8 on # GPIO 2
end
device pnp 3f0.a on # ACPI
end
end
end
device pci 4.1 on end # IDE
device pci 4.2 on end # USB
device pci 4.3 on end # ACPI
register "ide0_enable" = "1"
register "ide1_enable" = "1"
register "ide_legacy_enable" = "1"
# Enable UDMA/33 for higher speed if your IDE device(s) support it.
register "ide0_drive0_udma33_enable" = "0"
register "ide0_drive1_udma33_enable" = "0"
register "ide1_drive0_udma33_enable" = "0"
register "ide1_drive1_udma33_enable" = "0"
end
end
end

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@ -0,0 +1,14 @@
chip northbridge/intel/i440bx # Northbridge
device domain 0 on # PCI domain
chip southbridge/intel/i82371eb # Southbridge
device pci 4.0 on # ISA bridge
chip superio/winbond/w83977tf # Super I/O (FIXME: It's W83977EF!)
device pnp 3f0.6 on # Consumer IR
end
device pnp 3f0.a on # ACPI
end
end
end
end
end
end

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@ -1,58 +0,0 @@
chip northbridge/intel/i440bx # Northbridge
device cpu_cluster 0 on # APIC cluster
chip cpu/intel/slot_1 # CPU
device lapic 0 on end # APIC
end
end
device domain 0 on # PCI domain
device pci 0.0 on end # Host bridge
device pci 1.0 on end # PCI/AGP bridge
chip southbridge/intel/i82371eb # Southbridge
device pci 4.0 on # ISA bridge
chip superio/winbond/w83977tf # Super I/O (FIXME: It's W83977EF!)
device pnp 3f0.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 3f0.1 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 3f0.2 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 3f0.3 on # COM2 / IR
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 3f0.5 on # PS/2 keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1 # PS/2 keyboard interrupt
irq 0x72 = 12 # PS/2 mouse interrupt
end
device pnp 3f0.7 on # GPIO 1
end
device pnp 3f0.8 on # GPIO 2
end
device pnp 3f0.a off # ACPI
end
end
end
device pci 4.1 on end # IDE
device pci 4.2 on end # USB
device pci 4.3 on end # ACPI
device pci 6.0 on end # Onboard SCSI
register "ide0_enable" = "1"
register "ide1_enable" = "1"
register "ide_legacy_enable" = "1"
# Enable UDMA/33 for higher speed if your IDE device(s) support it.
register "ide0_drive0_udma33_enable" = "0"
register "ide0_drive1_udma33_enable" = "0"
register "ide1_drive0_udma33_enable" = "0"
register "ide1_drive1_udma33_enable" = "0"
end
end
end

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@ -0,0 +1,12 @@
chip northbridge/intel/i440bx # Northbridge
device domain 0 on # PCI domain
chip southbridge/intel/i82371eb # Southbridge
device pci 4.0 on # ISA bridge
chip superio/winbond/w83977tf # Super I/O
device pnp 3f0.a off # ACPI
end
end
end
end
end
end

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@ -0,0 +1,15 @@
chip northbridge/intel/i440bx # Northbridge
device domain 0 on # PCI domain
chip southbridge/intel/i82371eb # Southbridge
register "gpo" = "0x7fffbbff"
device pci 4.0 on # ISA bridge
chip superio/winbond/w83977tf # Super I/O
device pnp 3f0.9 on # GPIO 3
end
device pnp 3f0.a on # ACPI
end
end
end
end
end
end