diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c
index f6e1d24725..041b16d413 100644
--- a/src/soc/intel/meteorlake/chip.c
+++ b/src/soc/intel/meteorlake/chip.c
@@ -182,6 +182,9 @@ static void soc_enable(struct device *dev)
 	else if (dev->path.type == DEVICE_PATH_PCI &&
 		 dev->path.pci.devfn == PCI_DEVFN_PMC)
 		dev->ops = &pmc_ops;
+	else if (dev->path.type == DEVICE_PATH_PCI &&
+		 dev->path.pci.devfn == PCI_DEVFN_P2SB)
+		dev->ops = &soc_p2sb_ops;
 	else if (dev->path.type == DEVICE_PATH_PCI &&
 		 dev->path.pci.devfn == PCI_DEVFN_IOE_P2SB)
 		dev->ops = &ioe_p2sb_ops;
diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb
index af9049076b..0962a7cbb2 100644
--- a/src/soc/intel/meteorlake/chipset.cb
+++ b/src/soc/intel/meteorlake/chipset.cb
@@ -164,7 +164,7 @@ chip soc/intel/meteorlake
 		device pci 1e.4 alias tsn_gbe1 off end
 		device pci 1e.5 alias tsn_gbe2 off end
 		device pci 1f.0 alias soc_espi on end
-		device pci 1f.1 alias p2sb off end
+		device pci 1f.1 alias p2sb hidden end
 		device pci 1f.2 alias pmc hidden end
 		device pci 1f.3 alias hda off end
 		device pci 1f.4 alias smbus off end
diff --git a/src/soc/intel/meteorlake/include/soc/p2sb.h b/src/soc/intel/meteorlake/include/soc/p2sb.h
index 79ec2b1737..74c61ea97e 100644
--- a/src/soc/intel/meteorlake/include/soc/p2sb.h
+++ b/src/soc/intel/meteorlake/include/soc/p2sb.h
@@ -9,5 +9,6 @@
 #define PCH_P2SB_EPMASK0		0x220
 
 extern struct device_operations ioe_p2sb_ops;
+extern struct device_operations soc_p2sb_ops;
 
 #endif
diff --git a/src/soc/intel/meteorlake/p2sb.c b/src/soc/intel/meteorlake/p2sb.c
index 7809dd35aa..d700c707ea 100644
--- a/src/soc/intel/meteorlake/p2sb.c
+++ b/src/soc/intel/meteorlake/p2sb.c
@@ -2,6 +2,7 @@
 
 #include <console/console.h>
 #include <device/device.h>
+#include <device/pci_def.h>
 #include <intelblocks/p2sb.h>
 #include <soc/iomap.h>
 
@@ -37,8 +38,25 @@ static void ioe_p2sb_read_resources(struct device *dev)
 	mmio_resource_kb(dev, 0, IOM_BASE_ADDR / KiB, IOM_BASE_SIZE / KiB);
 }
 
+static void p2sb_read_resources(struct device *dev)
+{
+	/*
+	 * There's only one resource on the P2SB device. It's also already
+	 * manually set to a fixed address in earlier boot stages.
+	 * The following code makes sure that it doesn't change even the
+	 * resource allocator is being run.
+	 */
+	mmio_range(dev, PCI_BASE_ADDRESS_0, P2SB_BAR, P2SB_SIZE);
+}
+
 struct device_operations ioe_p2sb_ops = {
 	.read_resources   = ioe_p2sb_read_resources,
 	.set_resources    = noop_set_resources,
 	.scan_bus         = scan_static_bus,
 };
+
+struct device_operations soc_p2sb_ops = {
+	.read_resources   = p2sb_read_resources,
+	.set_resources    = noop_set_resources,
+	.scan_bus         = scan_static_bus,
+};