From 4ed8b305539f661895d9fa950bb32fc653e37f47 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Fri, 14 Jul 2017 14:25:39 -0700 Subject: [PATCH] rockchip/rk3399: Adjust gpio_t format to match ARM TF Our structure packing for Rockchip's gpio_t was chosen arbitrarily. ARM Trusted Firmware has since become a thing and chosen a slightly different way to represent GPIOs in a 32-bit word. Let's align our format to them so we don't need to remember to convert the values every time we pass them through. CQ-DEPEND=CL:572228 Change-Id: I9ce33da28ee8a34d2d944bee010d8bfc06fe879b Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/20586 Tested-by: build bot (Jenkins) --- src/mainboard/google/gru/mainboard.c | 10 +++++----- src/soc/rockchip/common/include/soc/gpio.h | 14 ++++++-------- 2 files changed, 11 insertions(+), 13 deletions(-) diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c index 099a3d9dcf..fa127edf82 100644 --- a/src/mainboard/google/gru/mainboard.c +++ b/src/mainboard/google/gru/mainboard.c @@ -99,7 +99,7 @@ static void register_gpio_suspend(void) .polarity = BL31_GPIO_LEVEL_LOW, }, }; - param_p15_en.gpio.index = GET_GPIO_NUM(GPIO_P15V_EN); + param_p15_en.gpio.index = GPIO_P15V_EN.raw; register_bl31_param(¶m_p15_en.h); static struct bl31_gpio_param param_p18_audio_en = { @@ -110,7 +110,7 @@ static void register_gpio_suspend(void) .polarity = BL31_GPIO_LEVEL_LOW, }, }; - param_p18_audio_en.gpio.index = GET_GPIO_NUM(GPIO_P18V_AUDIO_PWREN); + param_p18_audio_en.gpio.index = GPIO_P18V_AUDIO_PWREN.raw; register_bl31_param(¶m_p18_audio_en.h); static struct bl31_gpio_param param_p30_en = { @@ -121,7 +121,7 @@ static void register_gpio_suspend(void) .polarity = BL31_GPIO_LEVEL_LOW, }, }; - param_p30_en.gpio.index = GET_GPIO_NUM(GPIO_P30V_EN); + param_p30_en.gpio.index = GPIO_P30V_EN.raw; register_bl31_param(¶m_p30_en.h); } @@ -137,7 +137,7 @@ static void register_reset_to_bl31(void) }; /* gru/kevin reset pin: gpio0b3 */ - param_reset.gpio.index = GET_GPIO_NUM(GPIO_RESET), + param_reset.gpio.index = GPIO_RESET.raw, register_bl31_param(¶m_reset.h); } @@ -158,7 +158,7 @@ static void register_poweroff_to_bl31(void) * reuse with tsadc int pin, so iomux need set back to * gpio in BL31 and depthcharge before you setting this gpio */ - param_poweroff.gpio.index = GET_GPIO_NUM(GPIO_POWEROFF), + param_poweroff.gpio.index = GPIO_POWEROFF.raw, register_bl31_param(¶m_poweroff.h); } diff --git a/src/soc/rockchip/common/include/soc/gpio.h b/src/soc/rockchip/common/include/soc/gpio.h index 4c1cfa03cf..c9fa4c8339 100644 --- a/src/soc/rockchip/common/include/soc/gpio.h +++ b/src/soc/rockchip/common/include/soc/gpio.h @@ -19,8 +19,6 @@ #include #define GPIO(p, b, i) ((gpio_t){.port = p, .bank = GPIO_##b, .idx = i}) -#define GET_GPIO_NUM(gpio) (gpio.port * 32 + gpio.bank * 8 + gpio.idx) - struct rockchip_gpio_regs { u32 swporta_dr; @@ -43,16 +41,16 @@ check_member(rockchip_gpio_regs, ls_sync, 0x60); typedef union { u32 raw; struct { - u16 port; union { struct { - u16 num : 5; - u16 reserved1 : 11; + u32 num : 5; + u32 reserved1 : 27; }; struct { - u16 idx : 3; - u16 bank : 2; - u16 reserved2 : 11; + u32 idx : 3; + u32 bank : 2; + u32 port : 4; + u32 reserved2 : 23; }; }; };