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northbridge/amd/amdmct/mct_ddr3: Properly indicate clobbered registers 

Change-Id: Icb2754143762bd64ee1df5674fa071de1c595eaf
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12012
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Timothy Pearson 2015-06-27 17:52:18 -05:00 committed by Stefan Reinauer
parent dee6b1ff39
commit 4ef4fc6c3b
1 changed files with 9 additions and 2 deletions
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11
src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h
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@ -119,6 +119,9 @@ static void proc_CLFLUSH(u32 addr_hi)
static void WriteLNTestPattern(u32 addr_lo, u8 *buf_a, u32 line_num) static void WriteLNTestPattern(u32 addr_lo, u8 *buf_a, u32 line_num)
{ {
uint32_t step = 16;
uint32_t count = line_num * 4;
__asm__ volatile ( __asm__ volatile (
/*prevent speculative execution of following instructions*/ /*prevent speculative execution of following instructions*/
/* FIXME: needed ? */ /* FIXME: needed ? */
@ -131,7 +134,7 @@ static void WriteLNTestPattern(u32 addr_lo, u8 *buf_a, u32 line_num)
"loop 1b\n\t" "loop 1b\n\t"
"mfence\n\t" "mfence\n\t"
:: "a" (addr_lo), "d" (16), "c" (line_num * 4), "b"(buf_a) : "+a" (addr_lo), "+d" (step), "+c" (count), "+b" (buf_a) : :
); );
} }
@ -251,6 +254,10 @@ static void ReadMaxRdLat1CLTestPattern_D(u32 addr)
static void WriteMaxRdLat1CLTestPattern_D(u32 buf, u32 addr) static void WriteMaxRdLat1CLTestPattern_D(u32 buf, u32 addr)
{ {
uint32_t addr_phys = addr << 8;
uint32_t step = 16;
uint32_t count = 3 * 4;
SetUpperFSbase(addr); SetUpperFSbase(addr);
__asm__ volatile ( __asm__ volatile (
@ -263,7 +270,7 @@ static void WriteMaxRdLat1CLTestPattern_D(u32 buf, u32 addr)
"loop 1b\n\t" "loop 1b\n\t"
"mfence\n\t" "mfence\n\t"
:: "a" (addr<<8), "d" (16), "c" (3 * 4), "b"(buf) : "+a" (addr_phys), "+d" (step), "+c" (count), "+b" (buf) : :
); );
} }