reset: Provide new single-function reset API
board_reset() replaces the existing common reset API. There is no common distinction between reset types across platforms, hence, common code could never decide which one to call. Currently only hard_reset() is used by common code. We replace these calls and provide a fall-back to the current hard_reset() implemen- tation. The fall-back will be removed along with hard_reset() after the transition of all boards. Change-Id: I274a8cee9cb38226b5a0bdff6a847c74ef0b3128 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29047 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -147,7 +147,7 @@ static void root_dev_scan_bus(struct device *bus)
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static void root_dev_reset(struct bus *bus)
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{
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printk(BIOS_INFO, "Resetting board...\n");
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hard_reset();
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board_reset();
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}
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#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
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@ -1,7 +1,43 @@
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#ifndef RESET_H
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#define RESET_H
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/* Generic reset functions. Call from code that wants to trigger a reset. */
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/*
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* Generic board reset function. Call from common code that
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* wants to trigger a reset.
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*/
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__noreturn void board_reset(void);
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/*
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* SoC or board specific implementation of the board reset.
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*
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* Implementations shall meet the following criteria:
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*
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* o For vboot support, the TPM MUST be reset.
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*
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* o All SoC/chipset blocks SHOULD be reset except for those
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* that are intentionally meant to survive reset (e.g. tomb-
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* stone registers and that sort of stuff).
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*
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* o All external SoC pins SHOULD return to power-on reset values.
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*
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* o The CPU MUST resume execution from power-on reset vector
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* (same as cold boot).
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*
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* o Other board components (e.g. PCI, SDIO and stuff) SHOULD
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* be reset.
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*
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* o USB SHOULD be power-cycled.
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*
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* o Board components that are intended to be fully independent
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* from SoC (e.g. EC and EC-attached devices, the Cr50 on
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* Chromebooks) SHOULD NOT be reset.
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*
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* General recommendations:
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*
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* o DRAM SHOULD NOT lose power if possible.
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*
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* o Reset time SHOULD be minimized
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*/
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void do_board_reset(void);
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/* Super-hard reset specific to some Intel SoCs. */
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__noreturn void global_reset(void);
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@ -1,3 +1,10 @@
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config MISSING_BOARD_RESET
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bool
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help
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Selected by boards that don't provide a do_board_reset()
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implementation. This activates a stub that logs the missing
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board reset and halts execution.
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config NO_EDID_FILL_FB
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bool
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default y if !MAINBOARD_DO_NATIVE_VGA_INIT
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@ -84,8 +84,7 @@ static void ramstage_cache_invalid(void)
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{
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printk(BIOS_ERR, "ramstage cache invalid.\n");
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if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE)) {
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hard_reset();
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halt();
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board_reset();
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}
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}
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@ -18,6 +18,30 @@
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#include <halt.h>
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#include <reset.h>
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__noreturn void board_reset(void)
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{
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printk(BIOS_INFO, "%s() called!\n", __func__);
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dcache_clean_all();
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do_board_reset();
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halt();
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}
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#if IS_ENABLED(CONFIG_MISSING_BOARD_RESET)
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void do_board_reset(void)
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{
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printk(BIOS_CRIT, "No board_reset implementation, hanging...\n");
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}
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#else
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/*
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* Fall back to hard_reset() for a regression free transition.
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* FIXME: Remove after everything is converted to board_reset().
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*/
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__weak void do_board_reset(void)
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{
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hard_reset();
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}
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#endif
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__noreturn static void __hard_reset(void) {
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if (IS_ENABLED(CONFIG_HAVE_HARD_RESET))
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do_hard_reset();
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@ -18,7 +18,7 @@ config VBOOT
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bool "Verify firmware with vboot."
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default n
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select VBOOT_MOCK_SECDATA if !TPM1 && !TPM2
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depends on HAVE_HARD_RESET
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depends on HAVE_HARD_RESET || !MISSING_BOARD_RESET
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help
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Enabling VBOOT will use vboot to verify the components of the firmware
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(stages, payload, etc).
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@ -129,6 +129,5 @@ void vboot_reboot(void)
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if (IS_ENABLED(CONFIG_CONSOLE_CBMEM_DUMP_TO_UART))
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cbmem_dump_console();
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vboot_platform_prepare_reboot();
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hard_reset();
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die("failed to reboot");
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board_reset();
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}
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@ -52,5 +52,5 @@ void reboot_from_watchdog(void)
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{
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printk(BIOS_INFO, "Last reset was watchdog, reboot again to reset TPM!\n");
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mark_watchdog_tombstone();
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hard_reset();
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board_reset();
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}
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