diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc
index 4b967b0662..762b940626 100644
--- a/src/cpu/samsung/exynos5250/Makefile.inc
+++ b/src/cpu/samsung/exynos5250/Makefile.inc
@@ -1,8 +1,3 @@
-# Run an intermediate step when producing coreboot.rom
-# that adds additional components to the final firmware
-# image outside of CBFS
-INTERMEDIATE += exynos5250_add_bl1
-
 bootblock-y += spi.c alternate_cbfs.c
 bootblock-y += pinmux.c mct.c power.c
 # Clock is required for UART
@@ -54,6 +49,11 @@ ramstage-y += fb.c
 ramstage-y += usb.c
 ramstage-y += cbmem.c
 
+# Run an intermediate step when producing coreboot.rom
+# that adds additional components to the final firmware
+# image outside of CBFS
+.PHONY: exynos5250_add_bl1
+$(obj)/coreboot.rom: exynos5250_add_bl1
 exynos5250_add_bl1: $(obj)/coreboot.pre
 	printf "    DD         Adding Samsung Exynos5250 BL1\n"
 	dd if=3rdparty/cpu/samsung/exynos5250/bl1.bin \
diff --git a/src/cpu/samsung/exynos5420/Makefile.inc b/src/cpu/samsung/exynos5420/Makefile.inc
index 897944cf46..cbf9882448 100644
--- a/src/cpu/samsung/exynos5420/Makefile.inc
+++ b/src/cpu/samsung/exynos5420/Makefile.inc
@@ -1,8 +1,3 @@
-# Run an intermediate step when producing coreboot.rom
-# that adds additional components to the final firmware
-# image outside of CBFS
-INTERMEDIATE += exynos5420_add_bl1
-
 bootblock-y += spi.c alternate_cbfs.c
 bootblock-y += pinmux.c mct.c power.c
 # Clock is required for UART
@@ -54,6 +49,11 @@ ramstage-y += dp.c dp_lowlevel.c fimd.c
 ramstage-y += usb.c
 ramstage-y += cbmem.c
 
+# Run an intermediate step when producing coreboot.rom
+# that adds additional components to the final firmware
+# image outside of CBFS
+.PHONY: exynos5420_add_bl1
+$(obj)/coreboot.rom: exynos5420_add_bl1
 exynos5420_add_bl1: $(obj)/coreboot.pre
 	printf "    DD         Adding Samsung Exynos5420 BL1\n"
 	dd if=3rdparty/cpu/samsung/exynos5420/bl1.bin \