arch/x86/postcar: Add separate timestamp for postcar stage
This patch adds dedicated timestamp value for postcar stage. TEST=Able to see "start of postcar" and "end of postcar" timestamp while executing cbmem -t after booting to chrome console. > cbmem -t 951:returning from FspMemoryInit 20,485,324 (20,103,067) 4:end of romstage 20,559,235 (73,910) 100:start of postcar 20,560,266 (1,031) 101:end of postcar 20,570,038 (9,772) Change-Id: I084f66949667ad598f811d4233b4e639bc4c113e Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31762 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -19,6 +19,7 @@
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#include <cpu/x86/mtrr.h>
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#include <main_decl.h>
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#include <program_loading.h>
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#include <timestamp.h>
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/*
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* Systems without a native coreboot cache-as-ram teardown may implement
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@ -35,6 +36,8 @@ void main(void)
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/* Recover cbmem so infrastruture using it is functional. */
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cbmem_initialize();
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timestamp_add_now(TS_START_POSTCAR);
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display_mtrrs();
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/* Load and run ramstage. */
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@ -63,6 +63,8 @@ enum timestamp_id {
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TS_LOAD_PAYLOAD = 90,
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TS_ACPI_WAKE_JUMP = 98,
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TS_SELFBOOT_JUMP = 99,
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TS_START_POSTCAR = 100,
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TS_END_POSTCAR = 101,
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/* 500+ reserved for vendorcode extensions (500-600: google/chromeos) */
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TS_START_COPYVER = 501,
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@ -257,6 +259,8 @@ static const struct timestamp_id_to_name {
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{ TS_FSP_BEFORE_END_OF_FIRMWARE, "calling FspNotify(EndOfFirmware)" },
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{ TS_FSP_AFTER_END_OF_FIRMWARE,
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"returning from FspNotify(EndOfFirmware)" },
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{ TS_START_POSTCAR, "start of postcar" },
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{ TS_END_POSTCAR, "end of postcar" },
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};
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#endif
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@ -128,6 +128,9 @@ void run_ramstage(void)
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struct prog ramstage =
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PROG_INIT(PROG_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage");
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if (ENV_POSTCAR)
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timestamp_add_now(TS_END_POSTCAR);
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timestamp_add_now(TS_END_ROMSTAGE);
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/*
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