mb/google/volteer/variant/lindar: Create dynamic fan table mechanism

Add dynamic fan table mechanism for Lindar and Lillipup.
Create different fan tables that provided from thermal team.

BUG=b:185308432
TEST=Build FW and boot to OS modify CBI test with DPTF tool.

Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com>
Change-Id: I1b79dbe1ae6ee7aa41cef832b4ee305cc8f4b753
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Kevin Chang 2021-04-19 14:23:18 +08:00 committed by Patrick Georgi
parent b6a4476f34
commit 4f4eba9149
2 changed files with 117 additions and 1 deletions

View File

@ -8,7 +8,10 @@ fw_config
option USB3_NO_A 5 option USB3_NO_A 5
option USB3_NO_C 6 option USB3_NO_C 6
end end
field THERMAL 4 7 end field THERMAL 4 7
option FAN_TABLE_0 0
option FAN_TABLE_1 1
end
field AUDIO 8 10 field AUDIO 8 10
option NONE 0 option NONE 0
option MAX98357_ALC5682I_I2S 1 option MAX98357_ALC5682I_I2S 1

View File

@ -58,6 +58,119 @@ chip soc/intel/tigerlake
[PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoPci,
}" }"
device domain 0 on device domain 0 on
device ref dptf on
chip drivers/intel/dptf
## Fan Performance Control (Percent, Speed, Noise, Power)
register "controls.fan_perf" = "{
[0] = { 90, 6700, 220, 2200, },
[1] = { 80, 5800, 180, 1800, },
[2] = { 70, 5000, 145, 1450, },
[3] = { 60, 4900, 115, 1150, },
[4] = { 50, 3838, 90, 900, },
[5] = { 40, 2904, 55, 550, },
[6] = { 30, 2337, 30, 300, },
[7] = { 20, 1608, 15, 150, },
[8] = { 10, 800, 10, 100, },
[9] = { 0, 0, 0, 50, }}"
register "options.fan.fine_grained_control" = "1"
register "options.fan.step_size" = "2"
device generic 0 on
probe THERMAL FAN_TABLE_0
end
end
chip drivers/intel/dptf
## Active Policy
register "policies.active" = "{
[0] = {.target = DPTF_CPU,
.thresholds = {TEMP_PCT(85, 90),
TEMP_PCT(80, 69),
TEMP_PCT(75, 56),
TEMP_PCT(70, 46),
TEMP_PCT(65, 36),}},
[1] = {.target = DPTF_TEMP_SENSOR_0,
.thresholds = {TEMP_PCT(50, 90),
TEMP_PCT(47, 69),
TEMP_PCT(45, 56),
TEMP_PCT(42, 46),
TEMP_PCT(39, 36),}},
[2] = {.target = DPTF_TEMP_SENSOR_1,
.thresholds = {TEMP_PCT(50, 90),
TEMP_PCT(47, 69),
TEMP_PCT(45, 56),
TEMP_PCT(42, 46),
TEMP_PCT(39, 36),}},
[3] = {.target = DPTF_TEMP_SENSOR_2,
.thresholds = {TEMP_PCT(50, 90),
TEMP_PCT(47, 69),
TEMP_PCT(45, 56),
TEMP_PCT(42, 46),
TEMP_PCT(39, 36),}},
[4] = {.target = DPTF_TEMP_SENSOR_3,
.thresholds = {TEMP_PCT(50, 90),
TEMP_PCT(47, 69),
TEMP_PCT(45, 56),
TEMP_PCT(42, 46),
TEMP_PCT(39, 36),}}}"
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 65, 6000),
[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 65, 6000),
[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 6000),
[4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 65, 6000)}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN),
[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN),
[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 75, SHUTDOWN)}"
## Power Limits Control
# 3-15W PL1 in 200mW increments, avg over 28-32s interval
# PL2 ranges from 15 to 60W, avg over 28-32s interval
register "controls.power_limits" = "{
.pl1 = {.min_power = 3000,
.max_power = 15000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 200,},
.pl2 = {.min_power = 60000,
.max_power = 60000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,
.granularity = 1000,}}"
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 1700 },
[1] = { 24, 1500 },
[2] = { 16, 1000 },
[3] = { 8, 500 }}"
## Fan Performance Control (Percent, Speed, Noise, Power)
register "controls.fan_perf" = "{
[0] = { 100, 5800, 220, 2200, },
[1] = { 90, 5700, 180, 1800, },
[2] = { 80, 5050, 145, 1450, },
[3] = { 70, 4800, 115, 1150, },
[4] = { 65, 4500, 90, 900, },
[5] = { 60, 4200, 55, 550, },
[6] = { 55, 3800, 30, 300, },
[7] = { 50, 3508, 15, 150, },
[8] = { 45, 3400, 10, 100, },
[9] = { 0, 0, 0, 50, }}"
register "options.fan.fine_grained_control" = "1"
register "options.fan.step_size" = "2"
device generic 1 on
probe THERMAL FAN_TABLE_1
end
end
end
# Baseboard has these on, so they must be disabled here. # Baseboard has these on, so they must be disabled here.
device ref tbt_pcie_rp0 off end device ref tbt_pcie_rp0 off end
device ref tbt_pcie_rp1 off end device ref tbt_pcie_rp1 off end