diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h
index f9d20efddb..9edea5a06b 100644
--- a/src/include/cpu/amd/msr.h
+++ b/src/include/cpu/amd/msr.h
@@ -18,6 +18,7 @@
 #define  SMM_LOCK			(1 << 0)
 #define NB_CFG_MSR			0xC001001f
 #define FidVidStatus			0xC0010042
+#define MC0_CTL_MASK			0xC0010044
 #define MC1_CTL_MASK			0xC0010045
 #define MC4_CTL_MASK			0xC0010048
 #define MSR_INTPEND			0xC0010055
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
index 51ef2e08ea..b882e2f24d 100644
--- a/src/include/cpu/x86/msr.h
+++ b/src/include/cpu/x86/msr.h
@@ -83,7 +83,6 @@
 #define IA32_VMX_BASIC_MSR              0x480
 #define  VMX_BASIC_HI_DUAL_MONITOR      (1UL << (49 - 32))
 #define IA32_VMX_MISC_MSR               0x485
-#define MC0_CTL_MASK			0xC0010044
 
 #define IA32_PM_ENABLE			0x770
 #define IA32_HWP_CAPABILITIES		0x771
diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c
index e0c2791c2e..598bfb5d53 100644
--- a/src/soc/amd/stoneyridge/mca.c
+++ b/src/soc/amd/stoneyridge/mca.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/reset.h>
+#include <cpu/amd/msr.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/msr.h>
 #include <acpi/acpi.h>