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superio/winbond/w83627thg: Avoid .c includes 

Following the same reasoning as commit
d304331 superio/fintek/f81865f: Avoid .c includes
Clean up the early_serial #include directives in mainboard/romstage
code.

Change-Id: I1f7c20ac7841874125b6bfcd9f9db25d96355881
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5449
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Edward O'Callaghan 2014-04-03 14:40:24 +11:00 committed by Alexandru Gagniuc
parent 5ff4b086ba
commit 4f5a5254c5
8 changed files with 16 additions and 11 deletions
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2
src/mainboard/kontron/986lcd-m/romstage.c
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@ -32,7 +32,7 @@
#include "option_table.h" #include "option_table.h"
#include <console/console.h> #include <console/console.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include "superio/winbond/w83627thg/early_serial.c" #include <superio/winbond/w83627thg/w83627thg.h>
#include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/i945.h"
#include "northbridge/intel/i945/raminit.h" #include "northbridge/intel/i945/raminit.h"
#include "southbridge/intel/i82801gx/i82801gx.h" #include "southbridge/intel/i82801gx/i82801gx.h"

2
src/mainboard/lanner/em8510/romstage.c
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@ -34,7 +34,7 @@
#include "southbridge/intel/i82801dx/i82801dx.h" #include "southbridge/intel/i82801dx/i82801dx.h"
#include "northbridge/intel/i855/raminit.h" #include "northbridge/intel/i855/raminit.h"
#include "northbridge/intel/i855/debug.c" #include "northbridge/intel/i855/debug.c"
#include "superio/winbond/w83627thg/early_serial.c" #include <superio/winbond/w83627thg/w83627thg.h>
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)

2
src/mainboard/msi/ms7135/romstage.c
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@ -31,7 +31,7 @@
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
#include "cpu/x86/lapic.h" #include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/reset_test.c"
#include "superio/winbond/w83627thg/early_serial.c" #include <superio/winbond/w83627thg/w83627thg.h>
#include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/model_fxx_rev.h>
#include <console/console.h> #include <console/console.h>
#include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/incoherent_ht.c"

2
src/mainboard/winent/mb6047/romstage.c
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@ -16,7 +16,7 @@
#include "cpu/x86/lapic.h" #include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/reset_test.c"
#include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/debug.c"
#include "superio/winbond/w83627thg/early_serial.c" #include <superio/winbond/w83627thg/w83627thg.h>
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/setup_resource_map.c"

2
src/superio/winbond/w83627thg/Makefile.inc
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@ -20,5 +20,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
## ##
romstage-$(CONFIG_SUPERIO_WINBOND_W83627THG) += early_serial.c
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627THG) += superio.c ramstage-$(CONFIG_SUPERIO_WINBOND_W83627THG) += superio.c

2
src/superio/winbond/w83627thg/chip.h
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@ -30,4 +30,4 @@ struct superio_winbond_w83627thg_config {
struct pc_keyboard keyboard; struct pc_keyboard keyboard;
}; };
#endif #endif /* SUPERIO_WINBOND_W83627THG_CHIP_H */

7
src/superio/winbond/w83627thg/early_serial.c
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@ -21,22 +21,23 @@
*/ */
#include <arch/io.h> #include <arch/io.h>
#include <device/pnp.h>
#include "w83627thg.h" #include "w83627thg.h"
static void pnp_enter_ext_func_mode(device_t dev) void pnp_enter_ext_func_mode(device_t dev)
{ {
u16 port = dev >> 8; u16 port = dev >> 8;
outb(0x87, port); outb(0x87, port);
outb(0x87, port); outb(0x87, port);
} }
static void pnp_exit_ext_func_mode(device_t dev) void pnp_exit_ext_func_mode(device_t dev)
{ {
u16 port = dev >> 8; u16 port = dev >> 8;
outb(0xaa, port); outb(0xaa, port);
} }
static void inline w83627thg_enable_serial(device_t dev, u16 iobase) void w83627thg_enable_serial(device_t dev, u16 iobase)
{ {
pnp_enter_ext_func_mode(dev); pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev); pnp_set_logical_device(dev);

8
src/superio/winbond/w83627thg/w83627thg.h
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@ -34,6 +34,10 @@
#define W83627THG_ACPI 10 #define W83627THG_ACPI 10
#define W83627THG_HWM 11 /* Hardware monitor */ #define W83627THG_HWM 11 /* Hardware monitor */
void w83627thg_set_clksel_48(device_t dev); void pnp_enter_ext_func_mode(device_t dev);
void pnp_exit_ext_func_mode(device_t dev);
#endif void w83627thg_set_clksel_48(device_t dev);
void w83627thg_enable_serial(device_t dev, u16 iobase);
#endif /* SUPERIO_WINBOND_W83627THG_W83627THG_H */