skylake: prefix the gpio functions with 'gpio_'
In order to provide more clarity on what some of the gpio functions are doing add a 'gpio_' prefix to the globally visible functions. BUG=chrome-os-partner:42982 BRANCH=None TEST=Built glados. Change-Id: I4cf48558c1eb9986ed52b160b6564ceaa3cb94b4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: f79ef113797884063621fe6cd5cc374c53390ebd Original-Change-Id: I0d8003efff77b92802e0caf8125046203f315ae4 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/288192 Original-Reviewed-by: Robbie Zhang <robbie.zhang@intel.com> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/11067 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -25,8 +25,8 @@
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#include <soc/pm.h>
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/* Keep the ordering intact GPP_A ~ G, GPD.
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* As the gpio/smi functions get_smi_status() and
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* enable_gpio_groupsmi() depends on this ordering.
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* As the gpio/smi functions gpio_get_smi_status() and
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* gpio_enable_groupsmi() depends on this ordering.
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*/
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static const GPIO_GROUP_INFO gpio_group_info[] = {
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/* GPP_A */
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@ -245,7 +245,7 @@ void gpio_set(gpio_t gpio_num, int value)
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WRITE, &outputvalue);
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}
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void clear_all_smi(void)
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void gpio_clear_all_smi(void)
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{
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u32 gpiogroupinfolength;
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u32 gpioindex = 0;
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@ -264,7 +264,7 @@ void clear_all_smi(void)
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}
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}
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void get_smi_status(u32 status[GPIO_COMMUNITY_MAX])
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void gpio_get_smi_status(u32 status[GPIO_COMMUNITY_MAX])
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{
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u32 num_of_communities;
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u32 gpioindex;
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@ -285,7 +285,7 @@ void get_smi_status(u32 status[GPIO_COMMUNITY_MAX])
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}
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}
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void enable_all_smi(void)
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void gpio_enable_all_smi(void)
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{
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u32 gpiogroupinfolength;
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u32 gpioindex = 0;
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@ -304,7 +304,7 @@ void enable_all_smi(void)
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}
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}
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void enable_gpio_groupsmi(gpio_t gpio_num, u32 mask)
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void gpio_enable_groupsmi(gpio_t gpio_num, u32 mask)
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{
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u32 gpioindex = 0;
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u32 smien = 0;
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@ -23,6 +23,23 @@
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#include <stdint.h>
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/* SOC has 8 GPIO communities GPP A~G, GPD */
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#define GPIO_COMMUNITY_MAX 8
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typedef int gpio_t;
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/* Clear GPIO SMI Status */
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void gpio_clear_all_smi(void);
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/* Get GPIO SMI Status */
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void gpio_get_smi_status(u32 status[GPIO_COMMUNITY_MAX]);
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/* Enable GPIO SMI */
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void gpio_enable_all_smi(void);
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/* Enable GPIO individual Group SMI */
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void gpio_enable_groupsmi(gpio_t gpio_num, u32 mask);
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/*
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* GPP_Ax to GPP_Gx;
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* where x=24 [between GPIO Community A to F]
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@ -123,9 +140,6 @@ typedef struct {
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#define V_PCH_GPIO_GPP_G_PAD_MAX 8
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#define V_PCH_GPIO_GPD_PAD_MAX 12
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/* SOC has 8 GPIO communities GPP A~G, GPD */
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#define GPIO_COMMUNITY_MAX 8
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#define GPIO_GET_GROUP_INDEX(group) (group & 0xFF)
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#define GPIO_GET_GROUP_INDEX_FROM_PAD(pad) (\
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GPIO_GET_GROUP_INDEX((pad >> 16)))
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@ -295,20 +309,6 @@ typedef enum {
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GpioResetResume = 0x7 /* Resume Reset */
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} GPIO_RESET_CONFIG;
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typedef int gpio_t;
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/* Clear GPIO SMI Status */
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void clear_all_smi(void);
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/* Get GPIO SMI Status */
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void get_smi_status(u32 status[GPIO_COMMUNITY_MAX]);
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/* Enable GPIO SMI */
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void enable_all_smi(void);
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/* Enable GPIO individual Group SMI */
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void enable_gpio_groupsmi(gpio_t gpio_num, u32 mask);
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/*
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* GPIO Electrical Configuration
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* Set GPIO termination and Pad Tolerance (applicable only for some pads)
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@ -219,7 +219,7 @@ void disable_smi(u32 mask)
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void reset_alt_smi_status(void)
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{
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/*Clear GPIO SMI Status*/
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clear_all_smi();
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gpio_clear_all_smi();
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}
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/* Print GPIO SMI status bits */
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@ -237,7 +237,7 @@ static u32 print_alt_smi_status(void)
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};
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printk(BIOS_DEBUG, "ALT_STS: ");
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get_smi_status(alt_sts);
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gpio_get_smi_status(alt_sts);
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/* GPP_A to GPP_E GPIO has Status and Enable functionality*/
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for (gpio_index = 0; gpio_index < ARRAY_SIZE(gpiowell);
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gpio_index++) {
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@ -262,7 +262,7 @@ u32 clear_alt_smi_status(void)
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void enable_alt_smi(int gpionum, u32 mask)
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{
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/*Set GPIO EN Status*/
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enable_gpio_groupsmi(gpionum, mask);
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gpio_enable_groupsmi(gpionum, mask);
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}
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