cpu/intel/core2: Cache XIP romstage with C_ENVIRONMENT_BOOTBLOCK.
Tested on Thinkpad X200: the romstage execution speeds are back to pre-C_ENVIRONMENT_BOOTBLOCK levels. Change-Id: Id0b50d2f56e7cc0e055cdc8b9aa28794327eca28 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35994 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -13,3 +13,4 @@ config CPU_INTEL_MODEL_1067X
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select SUPPORT_CPU_UCODE_IN_CBFS
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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select SETUP_XIP_CACHE if C_ENVIRONMENT_BOOTBLOCK
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@ -14,3 +14,4 @@ config CPU_INTEL_MODEL_6FX
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select SUPPORT_CPU_UCODE_IN_CBFS
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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select SETUP_XIP_CACHE if C_ENVIRONMENT_BOOTBLOCK
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