mb/intel/jasperlake_rvp: Add DTT support for jslrvp
Add DTT (Dynamic Tuning Technology) support for Jasper Lake based rvp board. Set power limits and CPU sensor thresholds for DTT based thermal control. BRANCH=None BUG=Noe TEST=Build and boot on jslrvp board Change-Id: I41409c70d8472c54ca452fc98d5ee9edf3ccd307 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44942 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
parent
80518ee512
commit
4fb3a40679
|
@ -3,8 +3,10 @@ if BOARD_INTEL_JASPERLAKE_RVP || BOARD_INTEL_JASPERLAKE_RVP_EXT_EC
|
|||
config BOARD_SPECIFIC_OPTIONS
|
||||
def_bool y
|
||||
select BOARD_ROMSIZE_KB_16384
|
||||
select DPTF_USE_EISA_HID
|
||||
select DRIVERS_I2C_DA7219
|
||||
select DRIVERS_I2C_HID
|
||||
select DRIVERS_INTEL_DPTF
|
||||
select DRIVERS_I2C_GENERIC
|
||||
select DRIVERS_I2C_MAX98373
|
||||
select DRIVERS_INTEL_MIPI_CAMERA
|
||||
|
@ -17,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS
|
|||
select MAINBOARD_HAS_CHROMEOS
|
||||
select SOC_INTEL_COMMON_BLOCK_IPU
|
||||
select SOC_INTEL_JASPERLAKE
|
||||
select SOC_INTEL_COMMON_BLOCK_DTT
|
||||
select SOC_INTEL_CSE_LITE_SKU
|
||||
|
||||
config MAINBOARD_DIR
|
||||
|
|
|
@ -128,6 +128,15 @@ chip soc/intel/jasperlake
|
|||
# Enable DPTF
|
||||
register "dptf_enable" = "1"
|
||||
|
||||
# Enable Processor Thermal Control
|
||||
register "Device4Enable" = "1"
|
||||
|
||||
# Add PL1 and PL2 values
|
||||
register "power_limits_config" = "{
|
||||
.tdp_pl1_override = 6,
|
||||
.tdp_pl2_override = 20,
|
||||
}"
|
||||
|
||||
# Enable S0ix
|
||||
register "s0ix_enable" = "1"
|
||||
|
||||
|
@ -174,7 +183,27 @@ chip soc/intel/jasperlake
|
|||
device domain 0 on
|
||||
device pci 00.0 on end # Host Bridge
|
||||
device pci 02.0 on end # Integrated Graphics Device
|
||||
device pci 04.0 off end # SA Thermal device
|
||||
device pci 04.0 on
|
||||
chip drivers/intel/dptf
|
||||
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 1000)"
|
||||
register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 119, SHUTDOWN)"
|
||||
|
||||
register "controls.power_limits.pl1" = "{
|
||||
.min_power = 3000,
|
||||
.max_power = 6000,
|
||||
.time_window_min = 1 * MSECS_PER_SEC,
|
||||
.time_window_max = 1 * MSECS_PER_SEC,
|
||||
.granularity = 200,}"
|
||||
register "controls.power_limits.pl2" = "{
|
||||
.min_power = 6000,
|
||||
.max_power = 20000,
|
||||
.time_window_min = 1 * MSECS_PER_SEC,
|
||||
.time_window_max = 1 * MSECS_PER_SEC,
|
||||
.granularity = 1000,}"
|
||||
device generic 0 on end
|
||||
end
|
||||
end # SA Thermal device
|
||||
|
||||
device pci 05.0 on
|
||||
chip drivers/intel/mipi_camera
|
||||
register "acpi_uid" = "0x50000"
|
||||
|
|
Loading…
Reference in New Issue