cpu/amd/pi/00730F01: Use common code for mp_init

TEST=APU2 still boots and doesn't show any new errors in dmesg.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia9f0eb3df8fd2dfe395f616da981cc3a0cd3b29d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64891
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>

src/cpu/amd/pi/Makefile.inc

@@ -5,3 +5,4 @@ subdirs-$(CONFIG_CPU_AMD_PI_00730F01) += 00730F01
 romstage-y += ../../../soc/amd/common/block/cpu/smm/smm_helper.c
 postcar-y += ../../../soc/amd/common/block/cpu/smm/smm_helper.c
 ramstage-y += ../../../soc/amd/common/block/cpu/smm/smm_helper.c
+ramstage-y += ../../../soc/amd/common/block/cpu/smm/smm_relocate.c

src/northbridge/amd/pi/00730F01/northbridge.c

@@ -849,21 +849,11 @@ static struct device_operations pci_domain_ops = {
 	.acpi_name        = domain_acpi_name,
 };
 
-static void pre_mp_init(void)
-{
-	x86_setup_mtrrs_with_detect();
-	x86_mtrr_check();
-}
-
-static const struct mp_ops mp_ops = {
-	.pre_mp_init = pre_mp_init,
-	.get_cpu_count = get_cpu_count,
-};
-
 void mp_init_cpus(struct bus *cpu_bus)
 {
+	extern const struct mp_ops amd_mp_ops_no_smm;
 	/* TODO: Handle mp_init_with_smm failure? */
-	mp_init_with_smm(cpu_bus, &mp_ops);
+	mp_init_with_smm(cpu_bus, &amd_mp_ops_no_smm);
 
 	/* The flash is now no longer cacheable. Reset to WP for performance. */
 	mtrr_use_temp_range(OPTIMAL_CACHE_ROM_BASE, OPTIMAL_CACHE_ROM_SIZE,

src/soc/amd/common/block/cpu/smm/smm_relocate.c

@@ -100,3 +100,8 @@ const struct mp_ops amd_mp_ops_with_smm = {
 	.per_cpu_smm_trigger = smm_relocation_handler,
 	.post_mp_init = post_mp_init,
 };
+
+const struct mp_ops amd_mp_ops_no_smm = {
+	.pre_mp_init = pre_mp_init,
+	.get_cpu_count = get_cpu_count,
+};