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libpayload: Replace majority of timer drivers with a generic one 

Currently every non-x86 platform supported by libpayload needs to
provide its own timer driver. Most of the ones we have accumulated there
look almost identical: For the frequency, return a preset constant. For
the value, read a 32-bit register, possibly read another 32-bit register
and shift+OR it with the previous one, then return that.

Let's replace this with a single .c file that can easily handle all of
those cases. Menuconfig convenience can still be maintained by providing
several presets that select different defaults for the driver's
configuration options (register address(es) and frequency).

Removes an "enabled" check from Samsung MCT driver since coreboot always
unconditionally enables that timer anyway.

CQ-DEPEND=CL:344809
BRANCH=None
BUG=None
TEST=Booted Oak and Veyron, observed how dev-mode delay was still ~30s

Change-Id: I61cb7d2ffd4902aa841c57f9afa9cd991f770acd
Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Id: a036af6
Original-Change-Id: I9784e7c6aa5abd6d92478ea7ec1cf42c9a437546
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/347749
Reviewed-on: https://review.coreboot.org/17023
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Julius Werner 2016-05-16 15:39:12 -07:00
parent 9ac7a66f0e
commit 4fda9bd0ec
10 changed files with 66 additions and 440 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
payloads/libpayload/drivers/Makefile.inc
View File

@ -46,16 +46,11 @@ libc-$(CONFIG_LP_NVRAM) += nvram.c
libc-$(CONFIG_LP_NVRAM) += options.c
# Timer drivers
libc-$(CONFIG_LP_TIMER_MTK) += timer/mtk_timer.c
libc-$(CONFIG_LP_TIMER_MCT) += timer/mct.c
ifneq ($(CONFIG_LP_TIMER_GENERIC_HZ),0)
libc-y += timer/generic.c
endif
libc-$(CONFIG_LP_TIMER_RDTSC) += timer/rdtsc.c
libc-$(CONFIG_LP_TIMER_TEGRA_1US) += timer/tegra_1us.c
libc-$(CONFIG_LP_TIMER_IPQ806X) += timer/ipq806x.c
libc-$(CONFIG_LP_TIMER_IPQ40XX) += timer/ipq40xx.c
libc-$(CONFIG_LP_TIMER_RK) += timer/rktimer.c
libc-$(CONFIG_LP_TIMER_BG4CD) += timer/bg4cd.c
libc-$(CONFIG_LP_TIMER_IMG_PISTACHIO) += timer/img_pistachio.c
libc-$(CONFIG_LP_TIMER_CYGNUS) += timer/cygnus.c
libc-$(CONFIG_LP_TIMER_ARMADA38X) += timer/armada38x.c
libc-$(CONFIG_LP_TIMER_MVMAP2315) += timer/mvmap2315.c

95
payloads/libpayload/drivers/timer/Kconfig
View File

@ -46,11 +46,11 @@ config TIMER_IPQ40XX
This is the timer driver for QCA IPQ40xx based
platforms.
config TIMER_RK
bool "Timer for Rockchip"
config TIMER_RK3288
bool "Timer for Rockchip RK3288"
config TIMER_BG4CD
bool "Marvell BG4CD"
config TIMER_RK3399
bool "Timer for Rockchip RK3399"
config TIMER_CYGNUS
bool "Timer for Cygnus"
@ -66,41 +66,6 @@ config TIMER_MVMAP2315
endchoice
config TIMER_MCT_HZ
int "Exynos MCT frequency"
depends on TIMER_MCT
default 24000000
config TIMER_MCT_ADDRESS
hex "Exynos MCT base address"
depends on TIMER_MCT
default 0x101c0000
config TIMER_RK_ADDRESS
hex "Rockchip timer base address"
depends on TIMER_RK
default 0xff810020
config TIMER_TEGRA_1US_ADDRESS
hex "Tegra u1s timer base address"
depends on TIMER_TEGRA_1US
default 0x60005010
config IPQ806X_TIMER_FREQ
int "Hardware timer frequency"
default 32000
depends on TIMER_IPQ806X
help
IPQ hardware presently provides a single timer running at 32KHz, a
finer granulariry timer is available but is not yet enabled.
config IPQ806X_TIMER_REG
hex "Timer register address"
default 0x0200A008
depends on TIMER_IPQ806X
help
Address of the register to read a free running timer value.
config ARMADA38X_TIMER_FREQ
int "Hardware timer frequency"
depends on TIMER_ARMADA38X
@ -121,21 +86,43 @@ config MVMAP2315_TIMER_REG
depends on TIMER_MVMAP2315
default 0xE1020004
config IPROC_PERIPH_GLB_TIM_REG_BASE
hex "Cygnus timer base address"
depends on TIMER_CYGNUS
default 0x19020200
config TIMER_MTK_HZ
int "MediaTek GPT frequency"
depends on TIMER_MTK
default 13000000
config TIMER_GENERIC_HZ
int "Generic Timer Frequency"
default 500000000 if TIMER_CYGNUS
default 48000000 if TIMER_IPQ40XX
default 6250000 if TIMER_IPQ806X
default 24000000 if TIMER_MCT
default 13000000 if TIMER_MTK
default 24000000 if TIMER_RK3288
default 24000000 if TIMER_RK3399
default 1000000 if TIMER_TEGRA_1US
default 0
help
Clock frequency of MediaTek General Purpose Timer.
Clock frequency of generic time counter in Hertz. Leave at 0 to
disable when using a non-generic timer driver.
config TIMER_MTK_ADDRESS
hex "MTK GPT register address"
depends on TIMER_MTK
default 0x10008048
config TIMER_GENERIC_REG
hex "Generic Timer Register Address"
default 0x19020200 if TIMER_CYGNUS
default 0x004A2000 if TIMER_IPQ40XX
default 0x0200A028 if TIMER_IPQ806X
default 0x101C0100 if TIMER_MCT
default 0x10008048 if TIMER_MTK
default 0xff810028 if TIMER_RK3288
default 0xff850008 if TIMER_RK3399
default 0x60005010 if TIMER_TEGRA_1US
default 0x0
help
Address of GPT4's counter register to read the FREERUN-mode timer value.
Register address to read generic time counter from.
config TIMER_GENERIC_HIGH_REG
hex "Generic Timer High Register Address"
default 0x19020204 if TIMER_CYGNUS
default 0x004A2004 if TIMER_IPQ40XX
default 0x101C0104 if TIMER_MCT
default 0xff81002C if TIMER_RK3288
default 0xff85000C if TIMER_RK3399
default 0x0
help
Register address to read high 32 bits of generic time counter from.
Leave at 0x0 for 32-bit counters.

26
payloads/libpayload/drivers/timer/bg4cd.c
View File

@ -1,26 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Electronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <libpayload.h>
uint64_t timer_hz(void)
{
return 0;
}
uint64_t timer_raw_value(void)
{
return 0;
}

52
payloads/libpayload/drivers/timer/cygnus.c
View File

@ -1,52 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Google Electronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <libpayload.h>
struct cygnus_timer {
u32 gtim_glob_low;
u32 gtim_glob_hi;
u32 gtim_glob_ctrl;
};
static struct cygnus_timer * const timer_ptr =
(void *)CONFIG_LP_IPROC_PERIPH_GLB_TIM_REG_BASE;
uint64_t timer_hz(void)
{
/*
* this is set up by coreboot as follows:
*
* PERIPH_CLOCK /
* (((TIMER_GLB_TIM_CTRL_PRESC & TIMER_GLB_TIM_CTRL_PRESC_MASK)>>8) + 1)
*
* where PERIPH_CLOCK is typically 500000000.
*/
return 500000000;
}
uint64_t timer_raw_value(void)
{
uint64_t cur_tick;
uint32_t count_h;
uint32_t count_l;
do {
count_h = readl(&timer_ptr->gtim_glob_hi);
count_l = readl(&timer_ptr->gtim_glob_low);
cur_tick = readl(&timer_ptr->gtim_glob_hi);
} while (cur_tick != count_h);
return (cur_tick << 32) + count_l;
}

42
payloads/libpayload/drivers/timer/ipq806x.c → payloads/libpayload/drivers/timer/generic.c
View File

@ -1,7 +1,7 @@
/*
* This file is part of the depthcharge project.
* This file is part of the libpayload project.
*
* Copyright (C) 2014 The Linux Foundation. All rights reserved.
* Copyright 2016 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -14,6 +14,10 @@
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@ -27,32 +31,30 @@
* SUCH DAMAGE.
*/
#include <assert.h>
#include <libpayload.h>
/*
* TODO(vbendeb): reverted this hack once proper timer code is in place (see
* http://crosbug.com/p/28880 for details.
*/
#define MIN_TIMER_FREQ 1000000
uint64_t timer_hz(void)
{
return (CONFIG_LP_IPQ806X_TIMER_FREQ >= MIN_TIMER_FREQ) ?
CONFIG_LP_IPQ806X_TIMER_FREQ : MIN_TIMER_FREQ;
/* libc/time.c currently requires all timers to be at least 1MHz. */
assert(CONFIG_LP_TIMER_GENERIC_HZ >= 1000000);
return CONFIG_LP_TIMER_GENERIC_HZ;
}
uint64_t timer_raw_value(void)
{
uint64_t rawv = readl((void *)CONFIG_LP_IPQ806X_TIMER_REG);
uint64_t cur_tick;
uint32_t count_h;
uint32_t count_l;
/*
* This is extremely crude, but it kicks in only for the case when the
* timer clock frequency is below 1MHz, which should never be the case
* on a properly configured system. The compiler will eliminate the
* check as long as config value exceeds 1MHz.
*/
if (CONFIG_LP_IPQ806X_TIMER_FREQ < MIN_TIMER_FREQ)
rawv *= (MIN_TIMER_FREQ / CONFIG_LP_IPQ806X_TIMER_FREQ);
if (!CONFIG_LP_TIMER_GENERIC_HIGH_REG)
return readl(phys_to_virt(CONFIG_LP_TIMER_GENERIC_REG));
return rawv;
do {
count_h = readl(phys_to_virt(CONFIG_LP_TIMER_GENERIC_HIGH_REG));
count_l = readl(phys_to_virt(CONFIG_LP_TIMER_GENERIC_REG));
cur_tick = readl(phys_to_virt(CONFIG_LP_TIMER_GENERIC_REG));
} while (cur_tick != count_h);
return (cur_tick << 32) + count_l;
}

52
payloads/libpayload/drivers/timer/ipq40xx.c
View File

@ -1,52 +0,0 @@
/*
* Copyright (c) 2015, 2016, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* * Neither the name of The Linux Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <libpayload.h>
#define GCNT_FREQ_MHZ 48
#define MSM_TMR_BASE ((void *)0x004a1000u)
#define GCNT_CNTCV_LO (MSM_TMR_BASE + 0x1000)
#define GCNT_CNTCV_HI (MSM_TMR_BASE + 0x1004)
uint64_t timer_hz(void)
{
return GCNT_FREQ_MHZ * 1000 * 1000;
}
uint64_t timer_raw_value(void)
{
uint32_t hi, lo;
do {
hi = read32(GCNT_CNTCV_HI);
lo = read32(GCNT_CNTCV_LO);
} while (hi != read32(GCNT_CNTCV_HI));
return ((((uint64_t)hi) << 32) | lo);
}

115
payloads/libpayload/drivers/timer/mct.c
View File

@ -1,115 +0,0 @@
/*
* Copyright 2013 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <arch/io.h>
#include <libpayload.h>
#include <libpayload-config.h>
#include <stdint.h>
#include "config.h"
struct __attribute__((packed)) mct_regs
{
uint32_t mct_cfg;
uint8_t reserved0[0xfc];
uint32_t g_cnt_l;
uint32_t g_cnt_u;
uint8_t reserved1[0x8];
uint32_t g_cnt_wstat;
uint8_t reserved2[0xec];
uint32_t g_comp0_l;
uint32_t g_comp0_u;
uint32_t g_comp0_addr_incr;
uint8_t reserved3[0x4];
uint32_t g_comp1_l;
uint32_t g_comp1_u;
uint32_t g_comp1_addr_incr;
uint8_t reserved4[0x4];
uint32_t g_comp2_l;
uint32_t g_comp2_u;
uint32_t g_comp2_addr_incr;
uint8_t reserved5[0x4];
uint32_t g_comp3_l;
uint32_t g_comp3_u;
uint32_t g_comp3_addr_incr;
uint8_t reserved6[0x4];
uint32_t g_tcon;
uint32_t g_int_cstat;
uint32_t g_int_enb;
uint32_t g_wstat;
uint8_t reserved7[0xb0];
uint32_t l0_tcntb;
uint32_t l0_tcnto;
uint32_t l0_icntb;
uint32_t l0_icnto;
uint32_t l0_frcntb;
uint32_t l0_frcnto;
uint8_t reserved8[0x8];
uint32_t l0_tcon;
uint8_t reserved9[0xc];
uint32_t l0_int_cstat;
uint32_t l0_int_enb;
uint8_t reserved10[0x8];
uint32_t l0_wstat;
uint8_t reserved11[0xbc];
uint32_t l1_tcntb;
uint32_t l1_tcnto;
uint32_t l1_icntb;
uint32_t l1_icnto;
uint32_t l1_frcntb;
uint32_t l1_frcnto;
uint8_t reserved12[0x8];
uint32_t l1_tcon;
uint8_t reserved13[0xc];
uint32_t l1_int_cstat;
uint32_t l1_int_enb;
uint8_t reserved14[0x8];
uint32_t l1_wstat;
};
uint64_t timer_hz(void)
{
return CONFIG_LP_TIMER_MCT_HZ;
}
uint64_t timer_raw_value(void)
{
static int enabled = 0;
struct mct_regs * const mct =
(struct mct_regs *)(uintptr_t)CONFIG_LP_TIMER_MCT_ADDRESS;
if (!enabled) {
writel(readl(&mct->g_tcon) | (0x1 << 8), &mct->g_tcon);
enabled = 1;
}
uint64_t upper = readl(&mct->g_cnt_u);
uint64_t lower = readl(&mct->g_cnt_l);
return (upper << 32) | lower;
}

30
payloads/libpayload/drivers/timer/mtk_timer.c
View File

@ -1,30 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 MediaTek Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <libpayload.h>
#include <libpayload-config.h>
#include <stdint.h>
static uint32_t *const mtk_tmrus = (void*)CONFIG_LP_TIMER_MTK_ADDRESS;
uint64_t timer_hz(void)
{
return CONFIG_LP_TIMER_MTK_HZ;
}
uint64_t timer_raw_value(void)
{
return (uint64_t)readl(mtk_tmrus);
}

42
payloads/libpayload/drivers/timer/rktimer.c
View File

@ -1,42 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Rockchip Electronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <libpayload.h>
#include <stdint.h>
struct rk_timer {
u32 timer_load_count0;
u32 timer_load_count1;
u32 timer_curr_value0;
u32 timer_curr_value1;
u32 timer_ctrl_reg;
u32 timer_int_status;
};
uint64_t timer_hz(void)
{
return 24000000;
}
uint64_t timer_raw_value(void)
{
uint64_t upper;
uint64_t lower;
struct rk_timer *rk_timer;
rk_timer = (struct rk_timer *) CONFIG_LP_TIMER_RK_ADDRESS;
lower = (uint64_t) rk_timer->timer_curr_value0;
upper = (uint64_t) rk_timer->timer_curr_value1;
return (upper << 32) | lower;
}

41
payloads/libpayload/drivers/timer/tegra_1us.c
View File

@ -1,41 +0,0 @@
/*
* Copyright 2013 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <libpayload.h>
#include <libpayload-config.h>
static uint32_t * const tegra_tmrus = (void *)CONFIG_LP_TIMER_TEGRA_1US_ADDRESS;
uint64_t timer_hz(void)
{
return 1000 * 1000;
}
uint64_t timer_raw_value(void)
{
return readl(tegra_tmrus);
}