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sb/intel/lynxpoint/lpc.c: Simplify PM init sequence 

This sequence used to be an array of reg-and-or triplets, but can be
simplified. The resulting sequence is closer to what Broadwell does.

Change-Id: I21e79cbc1e995707b87c40187ddf03b872d02058
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46725
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-24 22:22:04 +02:00 committed by Patrick Georgi
parent 412679d892
commit 4fe4661d4e
1 changed files with 42 additions and 42 deletions
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84
src/southbridge/intel/lynxpoint/lpc.c
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@ -291,49 +291,49 @@ static void lpt_lp_pm_init(struct device *dev)
RCBA32_AND_OR(0x232c, ~1, 0x00000000); RCBA32_AND_OR(0x232c, ~1, 0x00000000);
RCBA32_AND_OR(0x1100, ~0xc000, 0xc000); RCBA32_AND_OR(0x1100, ~0xc000, 0xc000);
RCBA32_AND_OR(0x1100, ~0, 0x00000100); RCBA32_OR(0x1100, 0x00000100);
RCBA32_AND_OR(0x1100, ~0, 0x0000003f); RCBA32_OR(0x1100, 0x0000003f);
RCBA32_AND_OR(0x2320, ~0x60, 0x10); RCBA32_AND_OR(0x2320, ~0x60, 0x10);
RCBA32_AND_OR(0x3314, 0, 0x00012fff); RCBA32(0x3314) = 0x00012fff;
RCBA32_AND_OR(0x3318, 0, 0x0dcf0400); RCBA32(0x3318) = 0x0dcf0400;
RCBA32_AND_OR(0x3324, 0, 0x04000000); RCBA32(0x3324) = 0x04000000;
RCBA32_AND_OR(0x3368, 0, 0x00041400); RCBA32(0x3368) = 0x00041400;
RCBA32_AND_OR(0x3388, 0, 0x3f8ddbff); RCBA32(0x3388) = 0x3f8ddbff;
RCBA32_AND_OR(0x33ac, 0, 0x00007001); RCBA32(0x33ac) = 0x00007001;
RCBA32_AND_OR(0x33b0, 0, 0x00181900); RCBA32(0x33b0) = 0x00181900;
RCBA32_AND_OR(0x33c0, 0, 0x00060A00); RCBA32(0x33c0) = 0x00060A00;
RCBA32_AND_OR(0x33d0, 0, 0x06200840); RCBA32(0x33d0) = 0x06200840;
RCBA32_AND_OR(0x3a28, 0, 0x01010101); RCBA32(0x3a28) = 0x01010101;
RCBA32_AND_OR(0x3a2c, 0, 0x04040404); RCBA32(0x3a2c) = 0x04040404;
RCBA32_AND_OR(0x2b1c, 0, 0x03808033); RCBA32(0x2b1c) = 0x03808033;
RCBA32_AND_OR(0x2b34, 0, 0x80000009); RCBA32(0x2b34) = 0x80000009;
RCBA32_AND_OR(0x3348, 0, 0x022ddfff); RCBA32(0x3348) = 0x022ddfff;
RCBA32_AND_OR(0x334c, 0, 0x00000001); RCBA32(0x334c) = 0x00000001;
RCBA32_AND_OR(0x3358, 0, 0x0001c000); RCBA32(0x3358) = 0x0001c000;
RCBA32_AND_OR(0x3380, 0, 0x3f8ddbff); RCBA32(0x3380) = 0x3f8ddbff;
RCBA32_AND_OR(0x3384, 0, 0x0001c7e1); RCBA32(0x3384) = 0x0001c7e1;
RCBA32_AND_OR(0x338c, 0, 0x0001c7e1); RCBA32(0x338c) = 0x0001c7e1;
RCBA32_AND_OR(0x3398, 0, 0x0001c000); RCBA32(0x3398) = 0x0001c000;
RCBA32_AND_OR(0x33a8, 0, 0x00181900); RCBA32(0x33a8) = 0x00181900;
RCBA32_AND_OR(0x33dc, 0, 0x00080000); RCBA32(0x33dc) = 0x00080000;
RCBA32_AND_OR(0x33e0, 0, 0x00000001); RCBA32(0x33e0) = 0x00000001;
RCBA32_AND_OR(0x3a20, 0, 0x00000404); RCBA32(0x3a20) = 0x00000404;
RCBA32_AND_OR(0x3a24, 0, 0x01010101); RCBA32(0x3a24) = 0x01010101;
RCBA32_AND_OR(0x3a30, 0, 0x01010101); RCBA32(0x3a30) = 0x01010101;
RCBA32_AND_OR(0x0410, ~0, 0x00000003); RCBA32_OR(0x0410, 0x00000003);
RCBA32_AND_OR(0x2618, ~0, 0x08000000); RCBA32_OR(0x2618, 0x08000000);
RCBA32_AND_OR(0x2300, ~0, 0x00000002); RCBA32_OR(0x2300, 0x00000002);
RCBA32_AND_OR(0x2600, ~0, 0x00000008); RCBA32_OR(0x2600, 0x00000008);
RCBA32_AND_OR(0x33b4, 0, 0x00007001); RCBA32(0x33b4) = 0x00007001;
RCBA32_AND_OR(0x3350, 0, 0x022ddfff); RCBA32(0x3350) = 0x022ddfff;
RCBA32_AND_OR(0x3354, 0, 0x00000001); RCBA32(0x3354) = 0x00000001;
RCBA32_AND_OR(0x33d4, ~0, 0x08000000); /* Power Optimizer */ RCBA32_OR(0x33d4, 0x08000000); /* Power Optimizer */
RCBA32_AND_OR(0x33c8, ~0, 0x00000080); /* Power Optimizer */ RCBA32_OR(0x33c8, 0x00000080); /* Power Optimizer */
RCBA32_AND_OR(0x2b10, 0, 0x0000883c); /* Power Optimizer */ RCBA32(0x2b10) = 0x0000883c; /* Power Optimizer */
RCBA32_AND_OR(0x2b14, 0, 0x1e0a4616); /* Power Optimizer */ RCBA32(0x2b14) = 0x1e0a4616; /* Power Optimizer */
RCBA32_AND_OR(0x2b24, 0, 0x40000005); /* Power Optimizer */ RCBA32(0x2b24) = 0x40000005; /* Power Optimizer */
RCBA32_AND_OR(0x2b20, 0, 0x0005db01); /* Power Optimizer */ RCBA32(0x2b20) = 0x0005db01; /* Power Optimizer */
RCBA32_AND_OR(0x3a80, 0, 0x05145005); RCBA32(0x3a80) = 0x05145005;
pci_or_config32(dev, 0xac, 1 << 21); pci_or_config32(dev, 0xac, 1 << 21);