GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mainboard/intel/kblrvp: Revert back USB OC pin programming 

With commit 2c3054c1(soc/intel/skylake: Add USB Port Over
Current (OC) Pin programming) USB OC pin programming is already
initiated from devicetree.cb, hence remove it from ramstage.c.

BUG=none
BRANCH=none
TEST=Built and booted KBLRVP from USB device

Change-Id: Icb47533aa57f208d5a52560db924169b908c7a88
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/17635
Tested-by: build bot (Jenkins)
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Barnali Sarkar 2016-11-29 12:05:28 +05:30 committed by Aaron Durbin
parent 721d1b3090
commit 500ba45b2c
1 changed files with 0 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
src/mainboard/intel/kblrvp/ramstage.c
View File

@ -21,21 +21,10 @@
void mainboard_silicon_init_params(FSP_SIL_UPD *params) void mainboard_silicon_init_params(FSP_SIL_UPD *params)
{ {
size_t i;
/* Configure pads prior to SiliconInit() in case there's any /* Configure pads prior to SiliconInit() in case there's any
* dependencies during hardware initialization. */ * dependencies during hardware initialization. */
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
params->CdClock = 3; params->CdClock = 3;
/* Set proper OC for various USB ports*/
u8 usb2_oc[] = {0x0, 0x2, 0x8, 0x8, 0x2, 0x8, 0x8, 0x8, 0x1, 0x8};
u8 usb3_oc[] = {0x0, 0x8, 0x8, 0x1, 0x8, 0x8};
for (i = 0; i < ARRAY_SIZE(usb2_oc); i++)
params->Usb2OverCurrentPin[i] = usb2_oc[i];
for (i = 0; i < ARRAY_SIZE(usb3_oc); i++)
params->Usb3OverCurrentPin[i] = usb3_oc[i];
} }
static void ioexpander_init(void *unused) static void ioexpander_init(void *unused)