mb/google/sarien: Set touchpad/screen IRQs to LEVEL vs EDGE
Ensure the GPIOs themselves are configured as level triggered, as well as the devicetree entiures. I2C-HID spec requires LEVEL trigger, and the drivers (both Linux and Windows) work better with LEVEL vs EDGE trigger. TEST=tested with rest of patch train Change-Id: I4fba55c938f401876798c2b32c5922523f32180f Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74238 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -324,7 +324,7 @@ chip soc/intel/cannonlake
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)"
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
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register "detect" = "1"
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device i2c 2c on end
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end
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@ -39,7 +39,7 @@ static const struct pad_config gpio_table[] = {
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/* CORE_VID1 */
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/* VRALERT# */ PAD_NC(GPP_B2, NONE),
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/* CPU_GP2 */ PAD_CFG_GPI_APIC(GPP_B3, NONE, PLTRST,
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EDGE_SINGLE, INVERT), /* TOUCHPAD_INTR# */
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LEVEL, INVERT), /* TOUCHPAD_INTR# */
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/* CPU_GP3 */ PAD_CFG_GPI(GPP_B4, NONE, DEEP), /* TOUCH_SCREEN_DET# */
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/* LAN_CLKREQ_CPU_N */
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/* SRCCLKREQ0# */ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
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@ -338,7 +338,7 @@ chip soc/intel/cannonlake
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chip drivers/i2c/generic
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register "hid" = ""MLFS0000""
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register "desc" = ""Melfas Touchscreen""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C23_IRQ)"
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C23_IRQ)"
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register "probed" = "1"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E7)"
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register "reset_delay_ms" = "10"
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@ -354,7 +354,7 @@ chip soc/intel/cannonlake
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)"
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
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register "detect" = "1"
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device i2c 2c on end
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end
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@ -34,7 +34,7 @@ static const struct pad_config gpio_table[] = {
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/* CORE_VID1 */
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/* VRALERT# */ PAD_NC(GPP_B2, NONE),
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/* CPU_GP2 */ PAD_CFG_GPI_APIC(GPP_B3, NONE, PLTRST,
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EDGE_SINGLE, INVERT), /* TOUCHPAD_INTR# */
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LEVEL, INVERT), /* TOUCHPAD_INTR# */
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/* CPU_GP3 */ PAD_CFG_GPI(GPP_B4, NONE, DEEP), /* TOUCH_SCREEN_DET# */
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/* SRCCLKREQ0# */ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), /* CLKREQ_PCIE#0 */
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/* SRCCLKREQ1# */ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* CLKREQ_PCIE#1 */
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@ -81,7 +81,7 @@ static const struct pad_config gpio_table[] = {
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/* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVORX_UART */
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/* UART2_RTS# */ PAD_NC(GPP_C22, NONE),
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/* UART2_CTS# */ PAD_CFG_GPI_APIC(GPP_C23, NONE, PLTRST,
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EDGE_SINGLE, INVERT), /* TS_INT# */
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LEVEL, INVERT), /* TS_INT# */
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/* SPI1_CS# */ PAD_CFG_GPI_APIC(GPP_D0, NONE, PLTRST,
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EDGE_SINGLE, INVERT), /* MEDIACARD_IRQ# */
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