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mainboard/google/reef: update DMIC related pins configuration 

CLK_B1(GPIO_80) and DATA_2(GPIO_83) pins needs to be
configured as native mode to use them for DMIC record
on other potential DMIC's.

DMIC blobs configure the clocks. For stereo & quad channel
record, both CLK_A1 and CLK_B1 are enabled.
For mono channel record, only CLK_A1 is enabled.

BUG=chrome-os-partner:56918
BRANCH=None
TEST=During DMIC record, check CLK_B1 and DATA_2 lines

Change-Id: I838009b85190de5360d593238e48c9593c1dc43a
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-on: https://review.coreboot.org/17199
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Sathyanarayana Nujella 2016-10-31 10:48:43 -07:00 committed by Martin Roth
parent 37742f6870
commit 50198c1178
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/reef/variants/baseboard/gpio.c
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@ -219,10 +219,10 @@ static const struct pad_config gpio_table[] = {
/* DMIC or I2S4 */ /* DMIC or I2S4 */
PAD_CFG_NF(GPIO_79, NATIVE, DEEP, NF1), /* AVS_DMIC_CLK_A1 */ PAD_CFG_NF(GPIO_79, NATIVE, DEEP, NF1), /* AVS_DMIC_CLK_A1 */
PAD_CFG_GPI(GPIO_80, UP_20K, DEEP), /* unused */ PAD_CFG_NF(GPIO_80, NATIVE, DEEP, NF1), /* AVS_DMIC_CLK_B1 */
PAD_CFG_NF(GPIO_81, NATIVE, DEEP, NF1), /* AVS_DMIC_DATA_1 */ PAD_CFG_NF(GPIO_81, NATIVE, DEEP, NF1), /* AVS_DMIC_DATA_1 */
PAD_CFG_GPI(GPIO_82, DN_20K, DEEP), /* unused -- strap */ PAD_CFG_GPI(GPIO_82, DN_20K, DEEP), /* unused -- strap */
PAD_CFG_GPI(GPIO_83, UP_20K, DEEP), /* unused */ PAD_CFG_NF(GPIO_83, NATIVE, DEEP, NF1), /* AVS_DMIC_DATA_2 */
/* I2S2 -- Headset amp */ /* I2S2 -- Headset amp */
PAD_CFG_NF(GPIO_84, NATIVE, DEEP, NF1), /* AVS_I2S2_MCLK */ PAD_CFG_NF(GPIO_84, NATIVE, DEEP, NF1), /* AVS_I2S2_MCLK */