soc/amd/glinda/data_fabric: Add register bitslice struct

Add structs to define the data_fabric register bitfields, updated per
glinda ppr #57254, rev 1.51

Update IOMS0_FABRIC_ID and DF_MMIO_NP per referenced ppr.

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I509eaf5910d8d65ce0956200d7c00451ff9ce864
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Fred Reitberger 2022-10-31 15:55:44 -04:00
parent 89a987899e
commit 506014f624
1 changed files with 28 additions and 2 deletions

View File

@ -8,10 +8,36 @@
#include <types.h> #include <types.h>
/* SoC-specific bits in D18F0_MMIO_CTRL0 */ /* SoC-specific bits in D18F0_MMIO_CTRL0 */
#define DF_MMIO_NP BIT(16) #define DF_MMIO_NP BIT(3)
#define IOMS0_FABRIC_ID 9 #define IOMS0_FABRIC_ID 15
#define NUM_NB_MMIO_REGS 8 #define NUM_NB_MMIO_REGS 8
union df_mmio_control {
struct {
uint32_t re : 1; /* [ 0.. 0] */
uint32_t we : 1; /* [ 1.. 1] */
uint32_t : 1; /* [ 2.. 2] */
uint32_t np : 1; /* [ 3.. 3] */
uint32_t : 12; /* [15.. 4] */
uint32_t fabric_id : 6; /* [21..16] */
uint32_t : 10; /* [31..22] */
};
uint32_t raw;
};
union df_ficaa {
struct {
uint32_t cfg_inst_acc_en : 1; /* [ 0.. 0] */
uint32_t reg_num : 10; /* [10.. 1] */
uint32_t func_num : 3; /* [13..11] */
uint32_t b64_en : 1; /* [14..14] */
uint32_t : 1; /* [15..15] */
uint32_t inst_id : 8; /* [23..16] */
uint32_t : 8; /* [31..24] */
};
uint32_t raw;
};
#endif /* AMD_GLINDA_DATA_FABRIC_H */ #endif /* AMD_GLINDA_DATA_FABRIC_H */