soc/intel/broadwell: Use Lynx Point hda_verb.c

This allows dropping the SOC_INTEL_COMMON selection. Pull in the options
selected by SOC_INTEL_COMMON into Broadwell Kconfig as they still apply.

Change-Id: I0dd7de5358667240b0b3c1a550ba373a2a5af7d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51643
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

src/soc/intel/broadwell/Kconfig

@@ -13,10 +13,13 @@ config SOC_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_HAS_DEVICE_NVS
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
+	select ACPI_SOC_NVS
+	select AZALIA_PLUGIN_SUPPORT
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS
 	select CPU_INTEL_HASWELL
 	select MRC_SETTINGS_PROTECT
+	select HAVE_DISPLAY_MTRRS
 	select HAVE_SMI_HANDLER
 	select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
 	select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
@@ -30,7 +33,6 @@ config SOC_SPECIFIC_OPTIONS
 	select REG_SCRIPT
 	select RTC
 	select SPI_FLASH
-	select SOC_INTEL_COMMON
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
 	select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
 	select INTEL_GMA_ACPI

src/soc/intel/broadwell/pch/Makefile.inc

@@ -8,6 +8,7 @@ ramstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
 romstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
 smm-y      += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
 ramstage-y += hda.c
+ramstage-y += ../../../../southbridge/intel/lynxpoint/hda_verb.c
 ramstage-y += iobp.c
 romstage-y += iobp.c
 ramstage-y += fadt.c