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mb/purism/librem_skl: Fix CLKREQ for 15v3 NVMe 

Per the schematics, SRCCLKREQ2# is used for the NVMe and should be
enabled. Enable CLKREQ for PCIe RP9, and adjust comments to indicate
correct value used per schematic.

Test: build/boot Librem 15v3 with NVMe drive, verify drive identified
properly and no errors in boot log.

Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Change-Id: I159cb7ce1f5195d95c0229490c3bbde26edbd375
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2020-05-01 12:48:54 -05:00 committed by Patrick Georgi
parent 939cabfae4
commit 5086ccef19
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
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@ -167,8 +167,8 @@ chip soc/intel/skylake
register "PcieRpEnable[4]" = "1" register "PcieRpEnable[4]" = "1"
register "PcieRpEnable[8]" = "1" register "PcieRpEnable[8]" = "1"
# Enable CLKREQ# for RP9 # Enable CLKREQ# for RP9
register "PcieRpClkReqSupport[8]" = "0" register "PcieRpClkReqSupport[8]" = "1"
# ClkReq for NVMe - Bruteforced (no other value works) # SRCCLKREQ2# for NVMe per schematic
register "PcieRpClkReqNumber[8]" = "2" register "PcieRpClkReqNumber[8]" = "2"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port