mb/google/brya: Add entry stubs of each stage
Add entry point stubs of each stage for Brya. More functionalities will be added later. BUG=b:174266035 TEST=Build Test Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I44934c05ee32090b6e34648ee02f004c83e93d57 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48063 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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bootblock-y += bootblock.c
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romstage-y += romstage.c
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ramstage-y += mainboard.c
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subdirs-y += variants/baseboard
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <bootblock_common.h>
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void bootblock_mainboard_init(void)
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{
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/* TODO: Perform mainboard initialization */
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}
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <device/device.h>
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static void mainboard_init(void *chip_info)
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{
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/* TODO: Perform mainboard initialization */
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}
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static void mainboard_enable(struct device *dev)
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{
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/* TODO: Enable mainboard */
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}
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struct chip_operations mainboard_ops = {
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.init = mainboard_init,
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.enable_dev = mainboard_enable,
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};
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <fsp/api.h>
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#include <soc/romstage.h>
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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{
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/* ToDo : Fill FSP-M memory params */
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}
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef __BASEBOARD_GPIO_H__
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#define __BASEBOARD_GPIO_H__
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#include <soc/gpe.h>
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#include <soc/gpio.h>
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#endif /* __BASEBOARD_GPIO_H__ */
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef __BASEBOARD_VARIANTS_H__
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#define __BASEBOARD_VARIANTS_H__
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#include <soc/gpio.h>
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#include <stdint.h>
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#endif /*__BASEBOARD_VARIANTS_H__ */
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