soc/intel/common: Move PMC EPOC related code to Intel common code

Move PMC EPOC related code to intel/common/block because it is
generic for most Intel platforms and ADL, TGL & EHL use it.

Add a kconfig 'PMC_EPOC' to guard this common EPOC code.

The PMC EPOC register indicates which external crystal oscillator is
connected to the PCH.  This frequency is important for determining the
IP clock of internal PCH devices.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: Ib5fd3c4a648964678ee40ed0f60ca10fe7953f56
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55565
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Lean Sheng Tan 2021-06-16 01:32:22 -07:00 committed by Werner Zeh
parent f1ade489c8
commit 508dc163f1
11 changed files with 41 additions and 64 deletions

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@ -43,6 +43,7 @@ config CPU_SPECIFIC_OPTIONS
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
select PMC_EPOC
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK

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@ -100,30 +100,6 @@ extern struct device_operations pmc_ops;
#define PCH2CPU_TPR_CFG_LOCK (1 << 31)
#define PCH2CPU_TT_EN (1 << 26)
#define PCH_PMC_EPOC 0x18EC
#define PCH_EPOC_2LM(__epoc) ((__epoc) & 0x1)
/* XTAL frequency in bits 21, 20, 17 */
#define PCH_EPOC_XTAL_FREQ(__epoc) ((((__epoc) >> 19) & 0x6) | ((__epoc) >> 17 & 0x1))
/**
* enum pch_pmc_xtal - External crystal oscillator frequency.
* @XTAL_24_MHZ: 24 MHz external crystal.
* @XTAL_19_2_MHZ: 19.2 MHz external crystal.
* @XTAL_38_4_MHZ: 38.4 MHz external crystal.
*/
enum pch_pmc_xtal {
XTAL_24_MHZ,
XTAL_19_2_MHZ,
XTAL_38_4_MHZ,
};
/**
* pmc_get_xtal_freq() - Return frequency of external oscillator.
*
* Return &enum pch_pmc_xtal corresponding to frequency returned by PMC.
*/
enum pch_pmc_xtal pmc_get_xtal_freq(void);
#define PCH_PWRM_ACPI_TMR_CTL 0x18FC
#define ACPI_TIM_DIS (1 << 1)
#define GPIO_GPE_CFG 0x1920

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@ -23,13 +23,6 @@
#define PMC_HID "INTC1026"
enum pch_pmc_xtal pmc_get_xtal_freq(void)
{
uint8_t *const pmcbase = pmc_mmio_regs();
return PCH_EPOC_XTAL_FREQ(read32(pmcbase + PCH_PMC_EPOC));
}
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
{
uint32_t reg;

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@ -6,7 +6,6 @@
#include <device/soundwire.h>
#include <drivers/intel/soundwire/soundwire.h>
#include <intelblocks/pmclib.h>
#include <soc/pmc.h>
#include <stddef.h>
#include <string.h>

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@ -6,6 +6,28 @@
#include <device/pci_type.h>
#include <types.h>
#define PCH_PMC_EPOC 0x18EC
/* XTAL frequency in bits 21, 20, 17 */
#define PCH_EPOC_XTAL_FREQ(__epoc) ((((__epoc) >> 19) & 0x6) | ((__epoc) >> 17 & 0x1))
/**
* enum pch_pmc_xtal - External crystal oscillator frequency.
* @XTAL_24_MHZ: 24 MHz external crystal.
* @XTAL_19_2_MHZ: 19.2 MHz external crystal.
* @XTAL_38_4_MHZ: 38.4 MHz external crystal.
*/
enum pch_pmc_xtal {
XTAL_24_MHZ,
XTAL_19_2_MHZ,
XTAL_38_4_MHZ,
};
/*
* pmc_get_xtal_freq() - Return &enum pch_pmc_xtal corresponding to
* frequency of external oscillator.
*/
enum pch_pmc_xtal pmc_get_xtal_freq(void);
/* Forward declare the power state struct here */
struct chipset_power_state;

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@ -19,6 +19,12 @@ config SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE
Select this on platforms where the PMC device is discoverable
when scanning busses.
config PMC_EPOC
bool
help
Enable this for PMC devices to perform EPOC (CPU Early Power-on
Configuration) related functions.
endif # SOC_INTEL_COMMON_BLOCK_PMC
config PMC_INVALID_READ_AFTER_WRITE

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@ -2,6 +2,7 @@
#include <acpi/acpi_pm.h>
#include <arch/io.h>
#include <assert.h>
#include <bootmode.h>
#include <device/mmio.h>
#include <cbmem.h>
@ -725,3 +726,13 @@ void pmc_set_acpi_mode(void)
apm_control(APM_CNT_ACPI_DISABLE);
}
}
enum pch_pmc_xtal pmc_get_xtal_freq(void)
{
if (!CONFIG(PMC_EPOC))
dead_code();
const uintptr_t pmcbase = soc_read_pmc_base();
return PCH_EPOC_XTAL_FREQ(read32((uint32_t *)(pmcbase + PCH_PMC_EPOC)));
}

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@ -40,6 +40,7 @@ config CPU_SPECIFIC_OPTIONS
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
select PMC_EPOC
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK

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@ -101,30 +101,6 @@ extern struct device_operations pmc_ops;
#define PCH2CPU_TPR_CFG_LOCK (1 << 31)
#define PCH2CPU_TT_EN (1 << 26)
#define PCH_PMC_EPOC 0x18EC
#define PCH_EPOC_2LM(__epoc) ((__epoc) & 0x1)
/* XTAL frequency in bits 21, 20, 17 */
#define PCH_EPOC_XTAL_FREQ(__epoc) ((((__epoc) >> 19) & 0x6) | ((__epoc) >> 17 & 0x1))
/**
* enum pch_pmc_xtal - External crystal oscillator frequency.
* @XTAL_24_MHZ: 24 MHz external crystal.
* @XTAL_19_2_MHZ: 19.2 MHz external crystal.
* @XTAL_38_4_MHZ: 38.4 MHz external crystal.
*/
enum pch_pmc_xtal {
XTAL_24_MHZ,
XTAL_19_2_MHZ,
XTAL_38_4_MHZ,
};
/**
* pmc_get_xtal_freq() - Return frequency of external oscillator.
*
* Return &enum pch_pmc_xtal corresponding to frequency returned by PMC.
*/
enum pch_pmc_xtal pmc_get_xtal_freq(void);
#define PCH_PWRM_ACPI_TMR_CTL 0x18FC
#define ACPI_TIM_DIS (1 << 1)
#define GPIO_GPE_CFG 0x1920

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@ -22,13 +22,6 @@
#define PMC_HID "INTC1026"
enum pch_pmc_xtal pmc_get_xtal_freq(void)
{
uint8_t *const pmcbase = pmc_mmio_regs();
return PCH_EPOC_XTAL_FREQ(read32(pmcbase + PCH_PMC_EPOC));
}
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
{
uint32_t reg;

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@ -6,7 +6,6 @@
#include <device/soundwire.h>
#include <drivers/intel/soundwire/soundwire.h>
#include <intelblocks/pmclib.h>
#include <soc/pmc.h>
#include <string.h>
static const struct soundwire_link link_xtal_38_4 = {