vendercode/intel/fsp/skykabylake: Add new UPD SpiFlashCfgLockDown

A new UPD named SpiFlashCfgLockDown is added in the FSP-S
header file.

This change is going to come in FSP in the next FSP release.
This patch is pushed to urgently fix the SPI FPR locking issue.

CQ-DEPEND=CL:*414049
BUG=b:63049493
BRANCH=none
TEST=Built and boot poppy

Change-Id: I4725506103781a358b18ee70f4fdd56bf4ab3d96
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/20644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/vendorcode/intel/fsp/fsp2_0/skykabylake/FspsUpd.h

@@ -165,9 +165,16 @@ typedef struct {
 **/
   UINT8                       ShowSpiController;
 
-/** Offset 0x0036
+/** Offset 0x0036 - Flash Configuration Lock Down
+  Enable/disable flash lock down. If platform decides to skip this programming, it
+  must lock SPI flash register before end of post.
+  $EN_DIS
 **/
-  UINT8                       UnusedUpdSpace0[2];
+  UINT8                       SpiFlashCfgLockDown;
+
+/** Offset 0x0037
+**/
+  UINT8                       UnusedUpdSpace0;
 
 /** Offset 0x0038 - MicrocodeRegionBase
   Memory Base of Microcode Updates