Drop SuperIO smsc/fdc37m60x
All boards using this SuperIO have been removed from the tree already. Change-Id: I52847bc2fc16b27ac0de0bc7c847221b1e5cb744 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12245 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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09c0c114e6
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@ -19,8 +19,6 @@ config SUPERIO_WANTS_14MHZ_CLOCK
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config SUPERIO_SMSC_DME1737
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bool
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config SUPERIO_SMSC_FDC37M60X
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bool
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config SUPERIO_SMSC_FDC37N972
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bool
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config SUPERIO_SMSC_LPC47B272
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@ -15,7 +15,6 @@
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##
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subdirs-y += dme1737
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subdirs-y += fdc37m60x
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subdirs-y += fdc37n972
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subdirs-y += lpc47b272
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subdirs-y += lpc47b397
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@ -1,17 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ramstage-$(CONFIG_SUPERIO_SMSC_FDC37M60X) += superio.c
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@ -1,73 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include "fdc37m60x.h"
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/* The base address is 0x3f0 or 0x370, depending on the SYSOPT pin. */
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#define SIO_BASE 0x3f0
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#define SIO_INDEX SIO_BASE
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#define SIO_DATA (SIO_BASE + 1)
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/* Global configuration registers. */
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#define FDC37M60X_CONFIG_REG_CC 0x02 /* Configure Control. */
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#define FDC37M60X_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
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#define FDC37M60X_CONFIG_POWER_CONTROL 0x22 /* Power Control. */
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#define FDC37M60X_CONFIG_POWER_MGMT 0x23 /* Intelligent Power Mgmt. */
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#define FDC37M60X_CONFIG_OSC 0x24 /* OSC. */
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#define FDC37M60X_CONFIGURATION_PORT 0x3f0 /* Write-only. */
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/* The content of FDC37M60X_CONFIG_REG_LDN (index 0x07) must be set to the
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LDN the register belongs to, before you can access the register. */
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static void fdc37m60x_sio_write(uint8_t ldn, u8 index, u8 value)
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{
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outb(FDC37M60X_CONFIG_REG_LDN, SIO_BASE);
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outb(ldn, SIO_DATA);
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outb(index, SIO_BASE);
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outb(value, SIO_DATA);
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}
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/* Enable the peripheral devices on the FDC37M60X Super I/O chip. */
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static void fdc37m60x_enable_serial(pnp_devfn_t dev, u16 iobase)
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{
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/* (1) Enter the configuration state. */
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outb(0x55, FDC37M60X_CONFIGURATION_PORT);
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/* (2) Modify the data of configuration registers. */
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/* Power on all devices by setting the respective bit.
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Bits: 0 (FDC), 3 (PP), 4 (Com1), 5 (Com2). The rest is reserved. */
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fdc37m60x_sio_write(0x00, FDC37M60X_CONFIG_POWER_CONTROL, 0x39);
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/* Disable intelligent power management. */
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fdc37m60x_sio_write(0x00, FDC37M60X_CONFIG_POWER_MGMT, 0x00);
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/* Turn on OSC, turn on BRG clock. */
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fdc37m60x_sio_write(0x00, FDC37M60X_CONFIG_OSC, 0x04);
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/* Configure serial port 1. */
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fdc37m60x_sio_write(FDC37M60X_SP1, 0x60, 0x03);
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fdc37m60x_sio_write(FDC37M60X_SP1, 0x61, 0xf8); /* I/O 0x3f8 */
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fdc37m60x_sio_write(FDC37M60X_SP1, 0x70, 0x04); /* IRQ 4 */
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fdc37m60x_sio_write(FDC37M60X_SP1, 0xf0, 0x00); /* Normal */
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/* Enable serial port 1. */
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fdc37m60x_sio_write(FDC37M60X_SP1, 0x30, 0x01);
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/* (3) Exit the configuration state. */
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outb(0xaa, FDC37M60X_CONFIGURATION_PORT);
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}
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@ -1,39 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef SUPERIO_SMSC_FDC37M60X_FDC37M60X_H
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#define SUPERIO_SMSC_FDC37M60X_FDC37M60X_H
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/*
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* Datasheet:
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* - Name: FDC37M60x Enhanced Super I/O Controller with Infrared Support.
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* - URL: http://www.smsc.com/main/discfdc.html
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* - PDF: http://www.smsc.com/main/tools/discontinued/37m602.pdf
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* - Revision: 6/6/97
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*/
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/* Status: Serial port 1 is tested and works (tested on FDC37M602). */
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/* Note: Logical devices 1, 2, 6, and 9 are reserved. */
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#define FDC37M60X_FDC 0x00 /* Floppy */
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#define FDC37M60X_PP 0x03 /* Parallel port */
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#define FDC37M60X_SP1 0x04 /* Com1 */
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#define FDC37M60X_SP2 0x05 /* Com2 */
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#define FDC37M60X_KBCK 0x07 /* Keyboard */
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#define FDC37M60X_AUX 0x08 /* Auxiliary I/O */
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#endif
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@ -1,66 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <device/pnp.h>
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#include <pc80/keyboard.h>
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#include <stdlib.h>
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#include "fdc37m60x.h"
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static void init(struct device *dev)
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{
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if (!dev->enabled)
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return;
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switch (dev->path.pnp.device) {
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case FDC37M60X_FDC: /* TODO. */
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break;
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case FDC37M60X_PP: /* TODO. */
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break;
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case FDC37M60X_KBCK:
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pc_keyboard_init();
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break;
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case FDC37M60X_AUX: /* TODO. */
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break;
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}
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_enable,
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.init = init,
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};
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/* TODO: FDC, PP, AUX. */
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, FDC37M60X_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, FDC37M60X_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, },
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{ &ops, FDC37M60X_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &pnp_ops,
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ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_smsc_fdc37m60x_ops = {
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CHIP_NAME("SMSC FDC37M60X Super I/O")
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.enable_dev = enable_dev,
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};
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