Drop SuperIO smsc/fdc37m60x

All boards using this SuperIO have been removed from the tree already.

Change-Id: I52847bc2fc16b27ac0de0bc7c847221b1e5cb744
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12245
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Stefan Reinauer 2015-10-28 18:14:38 -07:00
parent 09c0c114e6
commit 50a29f8170
6 changed files with 0 additions and 198 deletions

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@ -19,8 +19,6 @@ config SUPERIO_WANTS_14MHZ_CLOCK
config SUPERIO_SMSC_DME1737 config SUPERIO_SMSC_DME1737
bool bool
config SUPERIO_SMSC_FDC37M60X
bool
config SUPERIO_SMSC_FDC37N972 config SUPERIO_SMSC_FDC37N972
bool bool
config SUPERIO_SMSC_LPC47B272 config SUPERIO_SMSC_LPC47B272

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@ -15,7 +15,6 @@
## ##
subdirs-y += dme1737 subdirs-y += dme1737
subdirs-y += fdc37m60x
subdirs-y += fdc37n972 subdirs-y += fdc37n972
subdirs-y += lpc47b272 subdirs-y += lpc47b272
subdirs-y += lpc47b397 subdirs-y += lpc47b397

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@ -1,17 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
ramstage-$(CONFIG_SUPERIO_SMSC_FDC37M60X) += superio.c

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@ -1,73 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include "fdc37m60x.h"
/* The base address is 0x3f0 or 0x370, depending on the SYSOPT pin. */
#define SIO_BASE 0x3f0
#define SIO_INDEX SIO_BASE
#define SIO_DATA (SIO_BASE + 1)
/* Global configuration registers. */
#define FDC37M60X_CONFIG_REG_CC 0x02 /* Configure Control. */
#define FDC37M60X_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
#define FDC37M60X_CONFIG_POWER_CONTROL 0x22 /* Power Control. */
#define FDC37M60X_CONFIG_POWER_MGMT 0x23 /* Intelligent Power Mgmt. */
#define FDC37M60X_CONFIG_OSC 0x24 /* OSC. */
#define FDC37M60X_CONFIGURATION_PORT 0x3f0 /* Write-only. */
/* The content of FDC37M60X_CONFIG_REG_LDN (index 0x07) must be set to the
LDN the register belongs to, before you can access the register. */
static void fdc37m60x_sio_write(uint8_t ldn, u8 index, u8 value)
{
outb(FDC37M60X_CONFIG_REG_LDN, SIO_BASE);
outb(ldn, SIO_DATA);
outb(index, SIO_BASE);
outb(value, SIO_DATA);
}
/* Enable the peripheral devices on the FDC37M60X Super I/O chip. */
static void fdc37m60x_enable_serial(pnp_devfn_t dev, u16 iobase)
{
/* (1) Enter the configuration state. */
outb(0x55, FDC37M60X_CONFIGURATION_PORT);
/* (2) Modify the data of configuration registers. */
/* Power on all devices by setting the respective bit.
Bits: 0 (FDC), 3 (PP), 4 (Com1), 5 (Com2). The rest is reserved. */
fdc37m60x_sio_write(0x00, FDC37M60X_CONFIG_POWER_CONTROL, 0x39);
/* Disable intelligent power management. */
fdc37m60x_sio_write(0x00, FDC37M60X_CONFIG_POWER_MGMT, 0x00);
/* Turn on OSC, turn on BRG clock. */
fdc37m60x_sio_write(0x00, FDC37M60X_CONFIG_OSC, 0x04);
/* Configure serial port 1. */
fdc37m60x_sio_write(FDC37M60X_SP1, 0x60, 0x03);
fdc37m60x_sio_write(FDC37M60X_SP1, 0x61, 0xf8); /* I/O 0x3f8 */
fdc37m60x_sio_write(FDC37M60X_SP1, 0x70, 0x04); /* IRQ 4 */
fdc37m60x_sio_write(FDC37M60X_SP1, 0xf0, 0x00); /* Normal */
/* Enable serial port 1. */
fdc37m60x_sio_write(FDC37M60X_SP1, 0x30, 0x01);
/* (3) Exit the configuration state. */
outb(0xaa, FDC37M60X_CONFIGURATION_PORT);
}

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@ -1,39 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef SUPERIO_SMSC_FDC37M60X_FDC37M60X_H
#define SUPERIO_SMSC_FDC37M60X_FDC37M60X_H
/*
* Datasheet:
* - Name: FDC37M60x Enhanced Super I/O Controller with Infrared Support.
* - URL: http://www.smsc.com/main/discfdc.html
* - PDF: http://www.smsc.com/main/tools/discontinued/37m602.pdf
* - Revision: 6/6/97
*/
/* Status: Serial port 1 is tested and works (tested on FDC37M602). */
/* Note: Logical devices 1, 2, 6, and 9 are reserved. */
#define FDC37M60X_FDC 0x00 /* Floppy */
#define FDC37M60X_PP 0x03 /* Parallel port */
#define FDC37M60X_SP1 0x04 /* Com1 */
#define FDC37M60X_SP2 0x05 /* Com2 */
#define FDC37M60X_KBCK 0x07 /* Keyboard */
#define FDC37M60X_AUX 0x08 /* Auxiliary I/O */
#endif

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@ -1,66 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include "fdc37m60x.h"
static void init(struct device *dev)
{
if (!dev->enabled)
return;
switch (dev->path.pnp.device) {
case FDC37M60X_FDC: /* TODO. */
break;
case FDC37M60X_PP: /* TODO. */
break;
case FDC37M60X_KBCK:
pc_keyboard_init();
break;
case FDC37M60X_AUX: /* TODO. */
break;
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_enable,
.init = init,
};
/* TODO: FDC, PP, AUX. */
static struct pnp_info pnp_dev_info[] = {
{ &ops, FDC37M60X_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
{ &ops, FDC37M60X_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, },
{ &ops, FDC37M60X_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_smsc_fdc37m60x_ops = {
CHIP_NAME("SMSC FDC37M60X Super I/O")
.enable_dev = enable_dev,
};