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soc/amd/mendocino: Remove the SPL DPTC parameter 

The SPL parameter for DPTC settings is not available for STT-enabled
platforms. It needs to be removed to avoid confusing STT calculations.

BUG=b:265267957
BRANCH=none
TEST=Run the WebGL aquarium with 5000 fish and verify that
there are no power drop peaks.

Change-Id: I8e6dad7d24883f8aadce83ebac401ecd4137d61a
Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73124
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Van Patten <timvp@google.com>
This commit is contained in:
Chris Wang 2023-02-20 10:27:50 +08:00 committed by Felix Held
parent 12bfe6bc95
commit 50aa3d9921
6 changed files with 4 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
View File

@ -260,6 +260,7 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW" = "30000"
register "slow_ppt_time_constant_s" = "5"
register "stapm_time_constant_s" = "275"
# Remove the sustained_power_limit_mW when STT is enabled
register "sustained_power_limit_mW" = "15000"
register "thermctl_limit_degreeC" = "100"
register "vrm_current_limit_mA" = "28000"

2
src/mainboard/google/skyrim/variants/frostflow/overridetree.cb
View File

@ -11,8 +11,6 @@ fw_config
end
chip soc/amd/mendocino
# Power table for tablet mode
register "sustained_power_limit_mW_tablet" = "12000"
register "i2c[0]" = "{
.speed = I2C_SPEED_FAST,

6
src/mainboard/google/skyrim/variants/whiterun/overridetree.cb
View File

@ -35,7 +35,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW" = "30000"
register "slow_ppt_limit_mW" = "18000"
register "slow_ppt_time_constant_s" = "7"
register "sustained_power_limit_mW" = "15000"
register "stt_min_limit" = "7000"
register "stt_m1" = "0x148"
@ -47,7 +46,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_B" = "20000"
register "slow_ppt_limit_mW_B" = "13000"
register "slow_ppt_time_constant_s_B" = "5"
register "sustained_power_limit_mW_B" = "10000"
register "stt_min_limit_B" = "5000"
register "stt_m1_B" = "0x11F"
@ -59,7 +57,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_C" = "30000"
register "slow_ppt_limit_mW_C" = "22000"
register "slow_ppt_time_constant_s_C" = "10"
register "sustained_power_limit_mW_C" = "15000"
register "stt_min_limit_C" = "10000"
register "stt_m1_C" = "0x1A4"
@ -71,7 +68,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_D" = "25000"
register "slow_ppt_limit_mW_D" = "15000"
register "slow_ppt_time_constant_s_D" = "8"
register "sustained_power_limit_mW_D" = "10000"
register "stt_min_limit_D" = "8000"
register "stt_m1_D" = "0x1C3"
@ -83,7 +79,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_E" = "22000"
register "slow_ppt_limit_mW_E" = "15000"
register "slow_ppt_time_constant_s_E" = "4"
register "sustained_power_limit_mW_E" = "12000"
register "stt_min_limit_E" = "7000"
register "stt_m1_E" = "0x114"
@ -96,7 +91,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_F" = "18000"
register "slow_ppt_limit_mW_F" = "12000"
register "slow_ppt_time_constant_s_F" = "2"
register "sustained_power_limit_mW_F" = "9000"
register "stt_min_limit_F" = "5000"
register "stt_m1_F" = "0x15C"

6
src/mainboard/google/skyrim/variants/winterhold/overridetree.cb
View File

@ -35,7 +35,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW" = "30000"
register "slow_ppt_limit_mW" = "25000"
register "slow_ppt_time_constant_s" = "5"
register "sustained_power_limit_mW" = "15000"
register "stt_min_limit" = "15000"
register "stt_m1" = "0x18F"
@ -47,7 +46,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_B" = "15000"
register "slow_ppt_limit_mW_B" = "15000"
register "slow_ppt_time_constant_s_B" = "5"
register "sustained_power_limit_mW_B" = "10500"
register "stt_min_limit_B" = "10500"
register "stt_m1_B" = "0x18F"
@ -59,7 +57,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_C" = "30000"
register "slow_ppt_limit_mW_C" = "25000"
register "slow_ppt_time_constant_s_C" = "5"
register "sustained_power_limit_mW_C" = "15000"
register "stt_min_limit_C" = "15000"
register "stt_m1_C" = "0x152"
@ -71,7 +68,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_D" = "15000"
register "slow_ppt_limit_mW_D" = "15000"
register "slow_ppt_time_constant_s_D" = "5"
register "sustained_power_limit_mW_D" = "10500"
register "stt_min_limit_D" = "10500"
register "stt_m1_D" = "0x152"
@ -83,7 +79,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_E" = "24000"
register "slow_ppt_limit_mW_E" = "20000"
register "slow_ppt_time_constant_s_E" = "5"
register "sustained_power_limit_mW_E" = "12000"
register "stt_min_limit_E" = "12000"
register "stt_m1_E" = "0x18F"
@ -96,7 +91,6 @@ chip soc/amd/mendocino
register "fast_ppt_limit_mW_F" = "12000"
register "slow_ppt_limit_mW_F" = "12000"
register "slow_ppt_time_constant_s_F" = "5"
register "sustained_power_limit_mW_F" = "8000"
register "stt_min_limit_F" = "8000"
register "stt_m1_F" = "0x18F"

6
src/soc/amd/mendocino/chip.h
View File

@ -73,13 +73,11 @@ struct soc_amd_mendocino_config {
uint32_t vrm_soc_current_limit_throttle_mA;
/* tablet mode.*/
uint32_t sustained_power_limit_mW_tablet;
/* Thermal profile B*/
uint32_t fast_ppt_limit_mW_B;
uint32_t slow_ppt_limit_mW_B;
uint32_t slow_ppt_time_constant_s_B;
uint32_t sustained_power_limit_mW_B;
uint16_t stt_min_limit_B;
uint16_t stt_m1_B;
uint16_t stt_m2_B;
@ -90,7 +88,6 @@ struct soc_amd_mendocino_config {
uint32_t fast_ppt_limit_mW_C;
uint32_t slow_ppt_limit_mW_C;
uint32_t slow_ppt_time_constant_s_C;
uint32_t sustained_power_limit_mW_C;
uint16_t stt_min_limit_C;
uint16_t stt_m1_C;
uint16_t stt_m2_C;
@ -101,7 +98,6 @@ struct soc_amd_mendocino_config {
uint32_t fast_ppt_limit_mW_D;
uint32_t slow_ppt_limit_mW_D;
uint32_t slow_ppt_time_constant_s_D;
uint32_t sustained_power_limit_mW_D;
uint16_t stt_min_limit_D;
uint16_t stt_m1_D;
uint16_t stt_m2_D;
@ -112,7 +108,6 @@ struct soc_amd_mendocino_config {
uint32_t fast_ppt_limit_mW_E;
uint32_t slow_ppt_limit_mW_E;
uint32_t slow_ppt_time_constant_s_E;
uint32_t sustained_power_limit_mW_E;
uint16_t stt_min_limit_E;
uint16_t stt_m1_E;
uint16_t stt_m2_E;
@ -124,7 +119,6 @@ struct soc_amd_mendocino_config {
uint32_t fast_ppt_limit_mW_F;
uint32_t slow_ppt_limit_mW_F;
uint32_t slow_ppt_time_constant_s_F;
uint32_t sustained_power_limit_mW_F;
uint16_t stt_min_limit_F;
uint16_t stt_m1_F;
uint16_t stt_m2_F;

18
src/soc/amd/mendocino/root_complex.c
View File

@ -17,7 +17,7 @@
#include <stdint.h>
#include "chip.h"
#define DPTC_TOTAL_UPDATE_PARAMS 14
#define DPTC_TOTAL_UPDATE_PARAMS 13
struct dptc_input {
uint16_t size;
@ -25,8 +25,8 @@ struct dptc_input {
} __packed;
#define DPTC_INPUTS(_thermctllmit, _sustained, _spptTimeConst, _fast, _slow, \
_vrmCurrentLimit, _vrmMaxCurrentLimit, _vrmSocCurrentLimit, \
#define DPTC_INPUTS(_thermctllmit, _spptTimeConst, _fast, _slow, \
_vrmCurrentLimit, _vrmMaxCurrentLimit, _vrmSocCurrentLimit, \
_sttMinLimit, _sttM1, _sttM2, _sttCApu, _sttAlphaApu, _sttSkinTempLimitApu) \
{ \
.size = sizeof(struct dptc_input), \
@ -35,10 +35,6 @@ struct dptc_input {
.id = ALIB_DPTC_THERMAL_CONTROL_LIMIT_ID, \
.value = _thermctllmit, \
}, \
{ \
.id = ALIB_DPTC_SUSTAINED_POWER_LIMIT_ID, \
.value = _sustained, \
}, \
{ \
.id = ALIB_DPTC_SLOW_PPT_TIME_CONSTANT_ID, \
.value = _spptTimeConst, \
@ -226,7 +222,6 @@ static void acipgen_dptci(void)
/* Normal mode DPTC values. */
struct dptc_input default_input = DPTC_INPUTS(
config->thermctl_limit_degreeC,
config->sustained_power_limit_mW,
config->slow_ppt_time_constant_s,
config->fast_ppt_limit_mW,
config->slow_ppt_limit_mW,
@ -244,7 +239,6 @@ static void acipgen_dptci(void)
/* Low/No Battery */
struct dptc_input no_battery_input = DPTC_INPUTS(
config->thermctl_limit_degreeC,
config->sustained_power_limit_mW,
config->slow_ppt_time_constant_s,
config->fast_ppt_limit_mW,
config->slow_ppt_limit_mW,
@ -263,7 +257,6 @@ static void acipgen_dptci(void)
#if (CONFIG(FEATURE_TABLET_MODE_DPTC))
struct dptc_input tablet_input = DPTC_INPUTS(
config->thermctl_limit_degreeC,
config->sustained_power_limit_mW_tablet,
config->slow_ppt_time_constant_s,
config->fast_ppt_limit_mW,
config->slow_ppt_limit_mW,
@ -283,7 +276,6 @@ static void acipgen_dptci(void)
/* Profile B */
struct dptc_input thermal_B_input = DPTC_INPUTS(
config->thermctl_limit_degreeC,
config->sustained_power_limit_mW_B,
config->slow_ppt_time_constant_s_B,
config->fast_ppt_limit_mW_B,
config->slow_ppt_limit_mW_B,
@ -302,7 +294,6 @@ static void acipgen_dptci(void)
/* Profile C */
struct dptc_input thermal_C_input = DPTC_INPUTS(
config->thermctl_limit_degreeC,
config->sustained_power_limit_mW_C,
config->slow_ppt_time_constant_s_C,
config->fast_ppt_limit_mW_C,
config->slow_ppt_limit_mW_C,
@ -321,7 +312,6 @@ static void acipgen_dptci(void)
/* Profile D */
struct dptc_input thermal_D_input = DPTC_INPUTS(
config->thermctl_limit_degreeC,
config->sustained_power_limit_mW_D,
config->slow_ppt_time_constant_s_D,
config->fast_ppt_limit_mW_D,
config->slow_ppt_limit_mW_D,
@ -340,7 +330,6 @@ static void acipgen_dptci(void)
/* Profile E */
struct dptc_input thermal_E_input = DPTC_INPUTS(
config->thermctl_limit_degreeC,
config->sustained_power_limit_mW_E,
config->slow_ppt_time_constant_s_E,
config->fast_ppt_limit_mW_E,
config->slow_ppt_limit_mW_E,
@ -359,7 +348,6 @@ static void acipgen_dptci(void)
/* Profile F */
struct dptc_input thermal_F_input = DPTC_INPUTS(
config->thermctl_limit_degreeC,
config->sustained_power_limit_mW_F,
config->slow_ppt_time_constant_s_F,
config->fast_ppt_limit_mW_F,
config->slow_ppt_limit_mW_F,