armv7: unify stage hand-off routines
This replaces the current stage-specific exit/entry functions with generic versions. Now all stages compile with stage_entry(), which is placed at .text.stage_entry.armv7, and stage_exit(). Snow's ramstage files are also updated to avoid build breakage. Change-Id: I953a2c4b8121bd4b66c3362557997a9ca3aa53b0 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2254 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
This commit is contained in:
David Hendricks
Ronald G. Minnich
parent
79e36d9060
commit
50c0a50ac6
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@ -104,6 +104,14 @@ $(objcbfs)/%.elf: $(objcbfs)/%.debug
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$(OBJCOPY) --add-gnu-debuglink=$< $@.tmp
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mv $@.tmp $@
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stages_c = $(src)/arch/armv7/stages.c
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stages_o = $(obj)/arch/armv7/stages.o
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$(stages_o): $(stages_c)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -Wa,-acdlns -I. $(INCLUDES) -c -o $@ $< -marm
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################################################################################
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# Build the coreboot_ram (stage 2)
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@ -115,12 +123,12 @@ else
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/coreboot_ram.ld $<
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endif
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$(objgenerated)/coreboot_ram.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME)
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$(objgenerated)/coreboot_ram.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --wrap __do_div64 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
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else
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$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
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$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
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endif
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################################################################################
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@ -239,18 +247,11 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc)
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@printf " GEN $(subst $(obj)/,,$(@))\n"
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printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
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bootblock_exit_c = $(src)/arch/armv7/bootblock_exit.c
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bootblock_exit_o = $(obj)/arch/armv7/bootblock_exit.o
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$(bootblock_exit_o): $(bootblock_exit_c)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -Wa,-acdlns -I. $(INCLUDES) -c -o $@ $< -marm
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$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -Wa,-acdlns -c -o $@ $< > $(basename $@).disasm
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BOOTBLOCK_OBJS = $(objgenerated)/bootblock.o $(bootblock_exit_o)
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#BOOTBLOCK_OBJS = $(objgenerated)/bootblock.o $(bootblock_exit_o)
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$(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h
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@printf " CC $(subst $(obj)/,,$(@))\n"
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@ -262,39 +263,32 @@ $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_S
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$< > $(objgenerated)/bootblock.inc.d
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$(CC) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@
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$(objcbfs)/bootblock.debug: $(BOOTBLOCK_OBJS) $(objgenerated)/bootblock.ld
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$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD) -m armelf_linux_eabi -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld
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else
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(BOOTBLOCK_OBJS) $(LIBGCC_FILE_NAME) -Wl,--end-group
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(stages) $(LIBGCC_FILE_NAME) -Wl,--end-group
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endif
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################################################################################
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# Build the romstage
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romstage_main_c = $(src)/arch/armv7/romstage_main.c
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romstage_main_o = $(obj)/arch/armv7/romstage_main.o
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$(romstage_main_o): $(romstage_main_c)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -nostdlib -nostartfiles -static -c -o $@ $< -marm
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# FIXME(dhendrix): added debug printfs
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$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(romstage_main_o) $(objgenerated)/romstage_null.ld
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$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage_null.ld
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_null.ld
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else
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--start-group $(romstage-objs) $(romstage_main_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
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endif
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$(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld
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@printf " LINK $(subst $(obj)/,,$(@))\n"
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) $(romstage_main_o) -T $(objgenerated)/romstage_xip.ld
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$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) $(stages_o) -T $(objgenerated)/romstage_xip.ld
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else
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--start-group $(romstage-objs) $(romstage_main_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
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endif
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$(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions
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@ -20,9 +20,11 @@
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*/
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#include <bootblock_common.h>
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#include <arch/bootblock_exit.h>
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#include <arch/cbfs.h>
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#include <arch/hlt.h>
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#include <arch/stages.h>
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#include "stages.c"
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static int boot_cpu(void)
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{
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@ -34,7 +36,7 @@ static int boot_cpu(void)
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return 1;
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}
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void main(unsigned long bist)
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void main(void)
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{
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const char *target1 = "fallback/romstage";
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unsigned long romstage_entry;
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@ -49,6 +51,6 @@ void main(unsigned long bist)
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CBFS_DEFAULT_MEDIA, target1);
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printk(BIOS_INFO, "bootblock main(): jumping to romstage\n");
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if (romstage_entry) bootblock_exit(romstage_entry);
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if (romstage_entry) stage_exit(romstage_entry);
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hlt();
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}
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@ -32,6 +32,7 @@ SECTIONS
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*/
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.text : {
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_text = .;
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*(.text.stage_entry.armv7);
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*(.text);
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*(.text.*);
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. = ALIGN(16);
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@ -1,7 +1,7 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
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* Copyright (C) 2013 The ChromiumOS Authors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -17,13 +17,12 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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void main(void);
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#ifndef __ARCH_STAGES_H
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#define __ARCH_STAGES_H
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/* romstage_main is simply a stub to invoke main(), to handle ARM mode switching
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* (ARM/Thumb) properly. */
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extern void main(void);
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void romstage_main(void) __attribute__((section(".text.entry.armv7")));
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void romstage_main(void)
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{
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main();
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}
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void stage_entry(void) __attribute__((section(".text.stage_entry.armv7")));
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void stage_exit(unsigned long);
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#endif
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@ -9,8 +9,6 @@ romstage-y += syslib.c
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#ramstage-y += printk_init.c
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#romstage-y += walkcbfs.S
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ramstage-y += c_start.S
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ramstage-y += div0.c
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ramstage-y += div64.S
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ramstage-y += hang_spl.c
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@ -1,9 +0,0 @@
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.section ".text"
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.globl _start
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_start:
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bl _hardwaremain
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_hardwaremain: .word hardwaremain
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@ .word hardwaremain
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@ -38,7 +38,7 @@ SECTIONS
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.romtext . : {
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_rom = .;
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_start = .;
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*(.text.entry.armv7);
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*(.text.stage_entry.armv7);
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*(.text.startup);
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*(.text);
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}
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@ -0,0 +1,45 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* This file contains entry/exit functions for each stage during coreboot
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* execution (bootblock entry and ramstage exit will depend on external
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* loading.
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*
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* Unlike other files, this one should be compiled with a -m option to
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* specify a pre-determined instruction set. The is to ensure consistency
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* in the CPU operating mode (ARM or Thumb) when hand-off between stages
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* occurs.
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*
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* Entry points must be placed at the location the previous stage jumps
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* to (the lowest address in the stage image). This is done by giving
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* stage_entry() its own section in .text and placing it first in the
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* linker script.
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*/
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#include <arch/stages.h>
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void stage_entry(void)
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{
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main();
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}
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void stage_exit(unsigned long addr)
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{
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__attribute__((noreturn)) void (*doit)(void) = (void *)addr;
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doit();
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}
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@ -28,6 +28,7 @@ romstage-y += romstage.c
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romstage-y += smdk5250_spl.c
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ramstage-y += smdk5250_spl.c
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#ramstage-y += mainboard.c
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ramstage-y += ramstage.c
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# romstage-$(CONFIG_CHROMEOS) += chromeos.c
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@ -18,6 +18,7 @@
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*/
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#include <device/device.h>
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#include <console/console.h>
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// mainboard_enable is executed as first thing after
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// enumerate_buses().
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@ -31,4 +32,3 @@ struct chip_operations mainboard_ops = {
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.name = "Samsung/Google ARM ChromeBook",
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.enable_dev = mainboard_enable,
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};
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@ -0,0 +1,32 @@
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/*
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* Copyright (C) 2013 The ChromeOS Authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <console/console.h>
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void main(void)
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{
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// volatile unsigned long *pshold = (unsigned long *)0x1004330c;
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// *pshold &= ~0x100; /* shut down */
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/* FIXME: console_init() seems to cause things to die... Maybe
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we need to reset our stack pointer? */
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// console_init();
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printk(BIOS_INFO, "hello from ramstage\n");
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while (1);
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}
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