glados: make EC_SMI_L functional
Set the EC_SMI_GPI define to be GPP_E15 and route that GPIO for SMI generation. Also, the mainboard_smi_gpi_handler() was introduced on skylake in order to process any GPI that could generate an SMI. Switch to this handler so one can process the appropriate events. BUG=chrome-os-partner:43778 BRANCH=None TEST=Used 'lidclose' on EC command line during depthcharge to confirm EC_SMI_L generates SMI and shutdown happens. Original-Change-Id: Ia365b86161670a809e3fa99dde38fccc612d5e77 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/291934 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: Ic16ea8e8d6ff564977ed2081d2353c82af71adea Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11209 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
parent
af030503e8
commit
50ed38feba
|
@ -22,11 +22,11 @@
|
||||||
#define MAINBOARD_EC_H
|
#define MAINBOARD_EC_H
|
||||||
|
|
||||||
#include <ec/google/chromeec/ec_commands.h>
|
#include <ec/google/chromeec/ec_commands.h>
|
||||||
|
#include <soc/gpio.h>
|
||||||
|
|
||||||
/* GPP_E16 is EC_SCI_L */
|
/* GPP_E16 is EC_SCI_L */
|
||||||
#define EC_SCI_GPI 16 /* TODO: Update this */
|
#define EC_SCI_GPI 16 /* TODO: Update this */
|
||||||
/* GPP_E15 is EC_SMI_L */
|
#define EC_SMI_GPI GPP_E15
|
||||||
#define EC_SMI_GPI 15 /* TODO: Update this */
|
|
||||||
|
|
||||||
#define MAINBOARD_EC_SCI_EVENTS \
|
#define MAINBOARD_EC_SCI_EVENTS \
|
||||||
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\
|
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\
|
||||||
|
|
|
@ -134,7 +134,7 @@ static const struct pad_config gpio_table[] = {
|
||||||
/* USB2_OC3# */ PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
|
/* USB2_OC3# */ PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
|
||||||
/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
|
/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
|
||||||
/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||||
/* DDPD_HPD2 */ PAD_CFG_NF(GPP_E15, NONE, DEEP, NF1),
|
/* DDPD_HPD2 */ PAD_CFG_GPI_ACPI_SMI(GPP_E15, NONE, DEEP, YES), /* EC_SMI_L */
|
||||||
/* DDPE_HPD3 */ PAD_CFG_NF(GPP_E16, NONE, DEEP, NF1),
|
/* DDPE_HPD3 */ PAD_CFG_NF(GPP_E16, NONE, DEEP, NF1),
|
||||||
/* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
|
/* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
|
||||||
/* DDPB_CTRLCLK */ /* GPP_E18 */
|
/* DDPB_CTRLCLK */ /* GPP_E18 */
|
||||||
|
|
|
@ -74,10 +74,9 @@ static u8 mainboard_smi_ec(void)
|
||||||
return cmd;
|
return cmd;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* gpi_sts is GPIO 47:32 */
|
void mainboard_smi_gpi_handler(const struct gpi_status *sts)
|
||||||
void mainboard_smi_gpi(u32 gpi_sts)
|
|
||||||
{
|
{
|
||||||
if (gpi_sts & (1 << EC_SMI_GPI)) {
|
if (gpi_status_get(sts, EC_SMI_GPI)) {
|
||||||
/* Process all pending events */
|
/* Process all pending events */
|
||||||
while (mainboard_smi_ec() != 0)
|
while (mainboard_smi_ec() != 0)
|
||||||
;
|
;
|
||||||
|
|
Loading…
Reference in New Issue