From 50eff1c083669fbcd78780e4e350ea771473c83c Mon Sep 17 00:00:00 2001
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
Date: Tue, 14 Sep 2021 19:26:22 +0800
Subject: [PATCH] mb/google/cherry: Fix unusable USB3 HUB

To save the S3 power, USB3_HUB_RST_L is externally pulled up to a
weak resistor so we have to reset the hub via GPIO84 as early
as possible. Otherwise the USB3 hub may be not usable.

BUG=b:199822702
TEST=measure voltage of USB3_HUB_RST_L as 1.8V

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ie87d631e83ede819ee9f9951dfc6517beae50247
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57663
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/cherry/bootblock.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/mainboard/google/cherry/bootblock.c b/src/mainboard/google/cherry/bootblock.c
index 93f0bce4ba..dca2f1383a 100644
--- a/src/mainboard/google/cherry/bootblock.c
+++ b/src/mainboard/google/cherry/bootblock.c
@@ -2,6 +2,7 @@
 
 #include <bootblock_common.h>
 #include <device/mmio.h>
+#include <gpio.h>
 #include <soc/gpio.h>
 #include <soc/i2c.h>
 #include <soc/spi.h>
@@ -35,6 +36,11 @@ static void nor_set_gpio_pinmux(void)
 	}
 }
 
+static void usb3_hub_reset(void)
+{
+	gpio_output(GPIO(DGI_D7), 1);
+}
+
 void bootblock_mainboard_init(void)
 {
 	mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS);
@@ -42,4 +48,5 @@ void bootblock_mainboard_init(void)
 	nor_set_gpio_pinmux();
 	setup_chromeos_gpios();
 	gpio_eint_configure(GPIO_GSC_AP_INT, IRQ_TYPE_EDGE_RISING);
+	usb3_hub_reset();
 }