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google/rush_ryu: devicetree: Add dsi panel mode settings 

BRANCH=none
BUG=chrome-os-partner:31936
TEST=build and test on ryu

Change-Id: I2bd1b2c2b1bfe75702a12129ca57b3afa6542575
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6aac5ecb014ab213f465b9aa78f587994c6b3624
Original-Change-Id: I64f2df49a258b4dd024305a9757704a823265e99
Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/229911
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9516
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Jimmy Zhang 2014-11-14 14:50:47 -08:00 committed by Patrick Georgi
parent 11e9622fc0
commit 51067116eb
1 changed files with 22 additions and 0 deletions
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22
src/mainboard/google/rush_ryu/devicetree.cb
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@ -24,4 +24,26 @@ chip soc/nvidia/tegra132
device cpu 0 on end
device cpu 1 on end
end
register "display_controller" = "TEGRA_ARM_DISPLAYA"
register "xres" = "2560"
register "yres" = "1800"
# bits per pixel and color depth
register "framebuffer_bits_per_pixel" = "32"
register "color_depth" = "12"
register "href_to_sync" = "1"
register "hfront_porch" = "80"
register "hsync_width" = "80"
register "hback_porch" = "80"
register "vref_to_sync" = "1"
register "vfront_porch" = "4"
register "vsync_width" = "4"
register "vback_porch" = "4"
register "refresh" = "60"
# kernel driver
register "pixel_clock" = "301620000"
end