GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

works for PCI vga cards too 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Li-Ta Lo 2005-01-11 22:48:54 +00:00
parent 51990b350a
commit 515f6c729e
7 changed files with 42 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/devices/device.c
View File

@ -378,6 +378,7 @@ static void allocate_vga_resource(void)
if (((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) && if (((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) &&
((dev->class >> 8) != PCI_CLASS_DISPLAY_OTHER)) { ((dev->class >> 8) != PCI_CLASS_DISPLAY_OTHER)) {
if (!vga) { if (!vga) {
printk_debug("Allocating VGA resource %s\n", dev_path(dev));
vga = dev; vga = dev;
} }
if (vga == dev) { if (vga == dev) {
@ -394,6 +395,8 @@ static void allocate_vga_resource(void)
} }
/* Now walk up the bridges setting the VGA enable */ /* Now walk up the bridges setting the VGA enable */
while (bus) { while (bus) {
printk_debug("Setting PCI_BRIDGE_CTL_VGA for bridge %s\n",
dev_path(bus->dev));
bus->bridge_ctrl |= PCI_BRIDGE_CTL_VGA; bus->bridge_ctrl |= PCI_BRIDGE_CTL_VGA;
bus = (bus == bus->dev->bus)? 0 : bus->dev->bus; bus = (bus == bus->dev->bus)? 0 : bus->dev->bus;
} }

23
src/devices/emulator/biosemu.c
View File

@ -46,8 +46,8 @@ int run_bios_int(int num)
X86_CS = MEM_RW((num << 2) + 2); X86_CS = MEM_RW((num << 2) + 2);
X86_IP = MEM_RW(num << 2); X86_IP = MEM_RW(num << 2);
printk_debug("%s: INT %x CS:IP = %x:%x\n", __FUNCTION__, //printk_debug("%s: INT %x CS:IP = %x:%x\n", __FUNCTION__,
num, MEM_RW((num << 2) + 2), MEM_RW(num << 2)); // num, MEM_RW((num << 2) + 2), MEM_RW(num << 2));
return 1; return 1;
} }
@ -58,8 +58,8 @@ u8 x_inb(u16 port)
val = inb(port); val = inb(port);
if (port != 0x40) //if (port != 0x40)
printk_debug("inb(0x%04x) = 0x%02x\n", port, val); // printk_debug("inb(0x%04x) = 0x%02x\n", port, val);
return val; return val;
} }
@ -70,7 +70,7 @@ u16 x_inw(u16 port)
val = inw(port); val = inw(port);
printk_debug("inw(0x%04x) = 0x%04x\n", port, val); //printk_debug("inw(0x%04x) = 0x%04x\n", port, val);
return val; return val;
} }
@ -80,26 +80,26 @@ u32 x_inl(u16 port)
val = inl(port); val = inl(port);
printk_debug("inl(0x%04x) = 0x%08x\n", port, val); //printk_debug("inl(0x%04x) = 0x%08x\n", port, val);
return val; return val;
} }
void x_outb(u16 port, u8 val) void x_outb(u16 port, u8 val)
{ {
if (port != 0x43) //if (port != 0x43)
printk_debug("outb(0x%02x, 0x%04x)\n", val, port); // printk_debug("outb(0x%02x, 0x%04x)\n", val, port);
outb(val, port); outb(val, port);
} }
void x_outw(u16 port, u16 val) void x_outw(u16 port, u16 val)
{ {
printk_debug("outw(0x%04x, 0x%04x)\n", val, port); //printk_debug("outw(0x%04x, 0x%04x)\n", val, port);
outw(val, port); outw(val, port);
} }
void x_outl(u16 port, u32 val) void x_outl(u16 port, u32 val)
{ {
printk_debug("outl(0x%08x, 0x%04x)\n", val, port); //printk_debug("outl(0x%08x, 0x%04x)\n", val, port);
outl(val, port); outl(val, port);
} }
@ -116,7 +116,7 @@ void do_int(int num)
{ {
int ret = 0; int ret = 0;
printk_debug("int%x vector at %x\n", num, getIntVect(num)); //printk_debug("int%x vector at %x\n", num, getIntVect(num));
switch (num) { switch (num) {
#ifndef _PC #ifndef _PC
@ -143,6 +143,7 @@ void do_int(int num)
break; break;
case 0x1A: case 0x1A:
ret = pcibios_handler(); ret = pcibios_handler();
ret = 1;
break; break;
case 0xe6: case 0xe6:
//ret = intE6_handler(); //ret = intE6_handler();

2
src/devices/emulator/pcbios/pcibios.c
View File

@ -12,8 +12,6 @@ int pcibios_handler()
int i, ret = 0; int i, ret = 0;
struct device *dev = 0; struct device *dev = 0;
printk_debug("%s AX = %x\n", __func__, X86_AX);
switch (X86_AX) { switch (X86_AX) {
case PCI_BIOS_PRESENT: case PCI_BIOS_PRESENT:
X86_AH = 0x00; /* no config space/special cycle support */ X86_AH = 0x00; /* no config space/special cycle support */

4
src/devices/emulator/x86emu/sys.c
View File

@ -205,8 +205,8 @@ u8 *mem_ptr(u32 addr, int size)
} else } else
#endif #endif
if (addr < 0x200) { if (addr < 0x200) {
printk("%x:%x updating int vector 0x%x\n", //printk("%x:%x updating int vector 0x%x\n",
M.x86.R_CS, M.x86.R_IP, addr >> 2); // M.x86.R_CS, M.x86.R_IP, addr >> 2);
retaddr = (u8 *) (M.mem_base + addr); retaddr = (u8 *) (M.mem_base + addr);
} else { } else {

6
src/devices/pci_device.c
View File

@ -537,6 +537,12 @@ void pci_dev_enable_resources(struct device *dev)
void pci_bus_enable_resources(struct device *dev) void pci_bus_enable_resources(struct device *dev)
{ {
uint16_t ctrl; uint16_t ctrl;
/* enable IO in command register if there is VGA card
* connected with (even it does not claim IO resource) */
if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA)
dev->command |= PCI_COMMAND_IO;
ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
ctrl |= dev->link[0].bridge_ctrl; ctrl |= dev->link[0].bridge_ctrl;
ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* error check */ ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* error check */

30
src/devices/pci_rom.c
View File

@ -17,17 +17,17 @@ struct rom_header * pci_rom_probe(struct device *dev)
return NULL; return NULL;
} }
printk_debug("%s, rom address for %s = %x\n", printk_spew("%s, rom address for %s = %x\n",
__func__, dev_path(dev), rom_address); __func__, dev_path(dev), rom_address);
/* enable expansion ROM address decoding */ /* enable expansion ROM address decoding */
pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address|PCI_ROM_ADDRESS_ENABLE); pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address|PCI_ROM_ADDRESS_ENABLE);
rom_header = rom_address; rom_header = rom_address;
printk_debug("%s, PCI Expansion ROM, signature 0x%04x, \n\t" printk_spew("%s, PCI Expansion ROM, signature 0x%04x, \n\t"
"INIT size 0x%04x, data ptr 0x%04x\n", "INIT size 0x%04x, data ptr 0x%04x\n",
__func__, le32_to_cpu(rom_header->signature), __func__, le32_to_cpu(rom_header->signature),
rom_header->size * 512, le32_to_cpu(rom_header->data)); rom_header->size * 512, le32_to_cpu(rom_header->data));
if (le32_to_cpu(rom_header->signature) != PCI_ROM_HDR) { if (le32_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
printk_err("%s, Incorrect Expansion ROM Header Signature %04x\n", printk_err("%s, Incorrect Expansion ROM Header Signature %04x\n",
__func__, le32_to_cpu(rom_header->signature)); __func__, le32_to_cpu(rom_header->signature));
@ -35,16 +35,16 @@ struct rom_header * pci_rom_probe(struct device *dev)
} }
rom_data = (unsigned char *) rom_header + le32_to_cpu(rom_header->data); rom_data = (unsigned char *) rom_header + le32_to_cpu(rom_header->data);
printk_debug("%s, PCI ROM Image, Vendor %04x, Device %04x,\n", printk_spew("%s, PCI ROM Image, Vendor %04x, Device %04x,\n",
__func__, rom_data->vendor, rom_data->device); __func__, rom_data->vendor, rom_data->device);
if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) { if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) {
printk_err("%s, Device or Vendor ID mismatch\n"); printk_err("%s, Device or Vendor ID mismatch\n");
return NULL; return NULL;
} }
printk_debug("%s, PCI ROM Image, Class Code %02x%04x, Code Type %02x\n", printk_spew("%s, PCI ROM Image, Class Code %02x%04x, Code Type %02x\n",
__func__, rom_data->class_hi, rom_data->class_lo, __func__, rom_data->class_hi, rom_data->class_lo,
rom_data->type); rom_data->type);
if ((dev->class >> 8) != (rom_data->class_hi << 16 | rom_data->class_lo)) { if ((dev->class >> 8) != (rom_data->class_hi << 16 | rom_data->class_lo)) {
printk_err("%s, Class Code mismatch %x\n", printk_err("%s, Class Code mismatch %x\n",
__func__, dev->class); __func__, dev->class);
@ -66,13 +66,13 @@ struct rom_header *pci_rom_load(struct device *dev, struct rom_header *rom_heade
rom_size = rom_header->size*512; rom_size = rom_header->size*512;
if (PCI_CLASS_DISPLAY_VGA == (rom_data->class_hi << 16 | rom_data->class_lo)) { if (PCI_CLASS_DISPLAY_VGA == (rom_data->class_hi << 16 | rom_data->class_lo)) {
printk_debug("%s, copying VGA ROM Image from %x to %x, %x bytes\n", printk_spew("%s, copying VGA ROM Image from %x to %x, %x bytes\n",
__func__, rom_header, PCI_VGA_RAM_IMAGE_START, rom_size); __func__, rom_header, PCI_VGA_RAM_IMAGE_START, rom_size);
memcpy(PCI_VGA_RAM_IMAGE_START, rom_header, rom_size); memcpy(PCI_VGA_RAM_IMAGE_START, rom_header, rom_size);
return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START); return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START);
} else { } else {
printk_debug("%s, copying non-VGA ROM Image from %x to %x, %x bytes\n", printk_spew("%s, copying non-VGA ROM Image from %x to %x, %x bytes\n",
__func__, rom_header, pci_ram_image_start, rom_size); __func__, rom_header, pci_ram_image_start, rom_size);
memcpy(pci_ram_image_start, rom_header, rom_size); memcpy(pci_ram_image_start, rom_header, rom_size);
pci_ram_image_start += rom_size; pci_ram_image_start += rom_size;
return (struct rom_header *) pci_ram_image_start; return (struct rom_header *) pci_ram_image_start;

4
src/northbridge/amd/amdk8/northbridge.c
View File

@ -387,6 +387,8 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
limit |= (nodeid & 7); limit |= (nodeid & 7);
if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
printk_spew("%s, enabling legacy VGA IO forwarding for %s link %s\n",
__func__, dev_path(dev), link);
base |= PCI_IO_BASE_VGA_EN; base |= PCI_IO_BASE_VGA_EN;
} }
if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) { if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) {
@ -439,6 +441,8 @@ static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
} }
} }
printk_spew("%s: link %d has VGA device\n", __func__, link);
/* no VGA card installed */ /* no VGA card installed */
if (link == dev->links) if (link == dev->links)
return; return;