diff --git a/src/soc/intel/cannonlake/acpi/scs.asl b/src/soc/intel/cannonlake/acpi/scs.asl
index 4d68d56391..4062e704a1 100644
--- a/src/soc/intel/cannonlake/acpi/scs.asl
+++ b/src/soc/intel/cannonlake/acpi/scs.asl
@@ -13,6 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <soc/pcr_ids.h>
+
 Scope (\_SB.PCI0) {
 	/* EMMC */
 	Device(PEMC) {
@@ -34,6 +36,10 @@ Scope (\_SB.PCI0) {
 
 			Store(0, PGEN) // Disable PG
 
+			/* Clear register 0x1C20/0x4820 */
+			^^PCRA (PID_EMMC, 0x1C20, 0x0)
+			^^PCRA (PID_EMMC, 0x4820, 0x0)
+
 			/* Set Power State to D0 */
 			And (PMCR, 0xFFFC, PMCR)
 			Store (PMCR, ^TEMP)
@@ -78,6 +84,10 @@ Scope (\_SB.PCI0) {
 		{
 			Store (0, PGEN) /* Disable PG */
 
+			/* Clear register 0x1C20/0x4820 */
+			^^PCRA (PID_SDX, 0x1C20, 0x0)
+			^^PCRA (PID_SDX, 0x4820, 0x0)
+
 			/* Set Power State to D0 */
 			And (PMCR, 0xFFFC, PMCR)
 			Store (PMCR, ^TEMP)
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl
index 8d74da9f42..4a62485324 100644
--- a/src/soc/intel/cannonlake/acpi/southbridge.asl
+++ b/src/soc/intel/cannonlake/acpi/southbridge.asl
@@ -19,12 +19,12 @@
 /* PCI IRQ assignment */
 #include "pci_irqs.asl"
 
-/* eMMC, SD Card */
-#include "scs.asl"
-
 /* PCR access */
 #include <soc/intel/common/acpi/pcr.asl>
 
+/* eMMC, SD Card */
+#include "scs.asl"
+
 /* GPIO controller */
 #include "gpio.asl"