From 5167c45d050ac1ab5d0d1fe7333b73bb842d3f56 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 3 Feb 2023 01:24:53 +0100 Subject: [PATCH] soc/amd/cezanne/chipset.cb: add missing ops for GPP GFX bridges Commit b171f768127d ("soc/amd/*: Hook up GPP bridges ops to devicetree") missed adding the amd_external_pcie_gpp_ops ops to the gpp_gfx_bridge PCIe ports, so add them. Those devices were previously covered by the PCI_DID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1 PCI device ID in the list that got removed in the referenced commit. Signed-off-by: Felix Held Change-Id: I55434bf486569b32901b3840193a09cc5955abb2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72735 Tested-by: build bot (Jenkins) Reviewed-by: Fred Reitberger --- src/soc/amd/cezanne/chipset.cb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb index 691153f87b..c7793905ae 100644 --- a/src/soc/amd/cezanne/chipset.cb +++ b/src/soc/amd/cezanne/chipset.cb @@ -8,9 +8,9 @@ chip soc/amd/cezanne device pci 00.2 alias iommu off ops amd_iommu_ops end device pci 01.0 on end # Dummy Host Bridge, do not disable - device pci 01.1 alias gpp_gfx_bridge_0 off end - device pci 01.2 alias gpp_gfx_bridge_1 off end - device pci 01.3 alias gpp_gfx_bridge_2 off end + device pci 01.1 alias gpp_gfx_bridge_0 off ops amd_external_pcie_gpp_ops end + device pci 01.2 alias gpp_gfx_bridge_1 off ops amd_external_pcie_gpp_ops end + device pci 01.3 alias gpp_gfx_bridge_2 off ops amd_external_pcie_gpp_ops end device pci 02.0 on end # Dummy Host Bridge, do not disable device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end