soc/intel/common/block/smm: Ignore PM1 and GPE0 events in SCI mode
When the SCI_EN bit is set, PM1 and GPE0 events will trigger a SCI instead of a SMI#. However, SMI_STS bits PM1_STS and GPE0_STS can still be set. Therefore, when SCI_EN is set, ignore PM1 and GPE0 events in the SMI# handler, as these events have triggered a SCI. Do not ignore any other SMI# types, since they cannot cause a SCI. Note that these bits are reserved on APL and GLK. However, SoC-specific code already accounts for it. Thus, no special handling is needed here. Change-Id: I5998b6bd61d796101786b57f9094cdaf0c3dfbaa Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50750 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -46,8 +46,6 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void);
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*/
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extern const smi_handler_t southbridge_smi[32];
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#define SMI_HANDLER_SCI_EN(__bit) (1 << (__bit))
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/*
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* This function should be implemented in SOC specific code to handle
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* the SMI event on SLP_EN. The default functionality is provided in
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@ -435,16 +435,6 @@ void smihandler_southbridge_espi(
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mainboard_smi_espi_handler();
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}
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/* SMI handlers that should be serviced in SCI mode too. */
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static uint32_t smihandler_soc_get_sci_mask(void)
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{
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uint32_t sci_mask =
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SMI_HANDLER_SCI_EN(APM_STS_BIT) |
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SMI_HANDLER_SCI_EN(SMI_ON_SLP_EN_STS_BIT);
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return sci_mask;
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}
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void southbridge_smi_handler(void)
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{
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int i;
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@ -458,12 +448,14 @@ void southbridge_smi_handler(void)
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smi_sts = pmc_clear_smi_status();
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/*
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* In SCI mode, execute only those SMI handlers that have
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* declared themselves as available for service in that mode
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* using smihandler_soc_get_sci_mask.
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* When the SCI_EN bit is set, PM1 and GPE0 events will trigger a SCI
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* instead of a SMI#. However, SMI_STS bits PM1_STS and GPE0_STS can
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* still be set. Therefore, when SCI_EN is set, ignore PM1 and GPE0
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* events in the SMI# handler, as these events have triggered a SCI.
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* Do not ignore any other SMI# types, since they cannot cause a SCI.
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*/
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if (pmc_read_pm1_control() & SCI_EN)
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smi_sts &= smihandler_soc_get_sci_mask();
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smi_sts &= ~(1 << PM1_STS_BIT | 1 << GPE0_STS_BIT);
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if (!smi_sts)
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return;
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