From 5183abd3123586d8daed9f0878cbc521b74c46ff Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 12 Jul 2021 21:47:57 +0200 Subject: [PATCH] soc/amd/picasso,stoneyridge/mca: clean up mca_bank struct Only the fields bank and sts from the mca_bank struct were used outside a local scope, so remove the rest. Also rename the struct that now only contains the bank number and the status MSR content to mca_bank_status. Change-Id: I925347dff950ac2bd021635ca988c02fba48df7f Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/56237 Reviewed-by: Raul Rangel Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/mca.c | 37 ++++++++++++++++------------------- src/soc/amd/stoneyridge/mca.c | 37 ++++++++++++++++------------------- 2 files changed, 34 insertions(+), 40 deletions(-) diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c index 3c5dd10c2c..84f3eadfd7 100644 --- a/src/soc/amd/picasso/mca.c +++ b/src/soc/amd/picasso/mca.c @@ -13,13 +13,9 @@ /* MISC4 is the last used register in the MCAX banks of Picasso */ #define MCAX_USED_REGISTERS_PER_BANK (MCAX_MISC4_OFFSET + 1) -struct mca_bank { +struct mca_bank_status { int bank; - msr_t ctl; msr_t sts; - msr_t addr; - msr_t misc; - msr_t cmask; }; static inline size_t mca_report_size_reqd(void) @@ -50,7 +46,7 @@ static inline size_t mca_report_size_reqd(void) return size; } -static enum cper_x86_check_type error_to_chktype(struct mca_bank *mci) +static enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci) { int error = mca_err_type(mci->sts); @@ -68,7 +64,7 @@ static enum cper_x86_check_type error_to_chktype(struct mca_bank *mci) /* Fill additional information in the Generic Processor Error Section. */ static void fill_generic_section(cper_proc_generic_error_section_t *sec, - struct mca_bank *mci) + struct mca_bank_status *mci) { int type = mca_err_type(mci->sts); @@ -91,7 +87,7 @@ static void fill_generic_section(cper_proc_generic_error_section_t *sec, * structures: A "processor generic error" that is parsed, and an IA32/X64 one * to capture complete information. */ -static void build_bert_mca_error(struct mca_bank *mci) +static void build_bert_mca_error(struct mca_bank_status *mci) { acpi_generic_error_status_t *status; acpi_hest_generic_data_v300_t *gen_entry; @@ -153,7 +149,8 @@ static const char *const mca_bank_name[] = { void check_mca(void) { int i; - struct mca_bank mci; + struct mca_bank_status mci; + msr_t msr; const unsigned int num_banks = mca_get_bank_count(); for (i = 0 ; i < num_banks ; i++) { @@ -165,18 +162,18 @@ void check_mca(void) printk(BIOS_WARNING, " MC%d_STATUS = %08x_%08x\n", i, mci.sts.hi, mci.sts.lo); - mci.addr = rdmsr(MCAX_ADDR_MSR(i)); + msr = rdmsr(MCAX_ADDR_MSR(i)); printk(BIOS_WARNING, " MC%d_ADDR = %08x_%08x\n", - i, mci.addr.hi, mci.addr.lo); - mci.misc = rdmsr(MCAX_MISC0_MSR(i)); + i, msr.hi, msr.lo); + msr = rdmsr(MCAX_MISC0_MSR(i)); printk(BIOS_WARNING, " MC%d_MISC = %08x_%08x\n", - i, mci.misc.hi, mci.misc.lo); - mci.ctl = rdmsr(MCAX_CTL_MSR(i)); + i, msr.hi, msr.lo); + msr = rdmsr(MCAX_CTL_MSR(i)); printk(BIOS_WARNING, " MC%d_CTL = %08x_%08x\n", - i, mci.ctl.hi, mci.ctl.lo); - mci.cmask = rdmsr(MCA_CTL_MASK_MSR(i)); + i, msr.hi, msr.lo); + msr = rdmsr(MCA_CTL_MASK_MSR(i)); printk(BIOS_WARNING, " MC%d_CTL_MASK = %08x_%08x\n", - i, mci.cmask.hi, mci.cmask.lo); + i, msr.hi, msr.lo); mci.bank = i; if (CONFIG(ACPI_BERT) && mca_valid(mci.sts)) @@ -185,8 +182,8 @@ void check_mca(void) } /* zero the machine check error status registers */ - mci.sts.lo = 0; - mci.sts.hi = 0; + msr.lo = 0; + msr.hi = 0; for (i = 0 ; i < num_banks ; i++) - wrmsr(MCAX_STATUS_MSR(i), mci.sts); + wrmsr(MCAX_STATUS_MSR(i), msr); } diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c index 6432ff433e..4c9d9b17aa 100644 --- a/src/soc/amd/stoneyridge/mca.c +++ b/src/soc/amd/stoneyridge/mca.c @@ -9,13 +9,9 @@ #include #include -struct mca_bank { +struct mca_bank_status { int bank; - msr_t ctl; msr_t sts; - msr_t addr; - msr_t misc; - msr_t cmask; }; static inline size_t mca_report_size_reqd(void) @@ -45,7 +41,7 @@ static inline size_t mca_report_size_reqd(void) return size; } -static enum cper_x86_check_type error_to_chktype(struct mca_bank *mci) +static enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci) { int error = mca_err_type(mci->sts); @@ -63,7 +59,7 @@ static enum cper_x86_check_type error_to_chktype(struct mca_bank *mci) /* Fill additional information in the Generic Processor Error Section. */ static void fill_generic_section(cper_proc_generic_error_section_t *sec, - struct mca_bank *mci) + struct mca_bank_status *mci) { int type = mca_err_type(mci->sts); @@ -91,7 +87,7 @@ static void fill_generic_section(cper_proc_generic_error_section_t *sec, * Processor Generic section and the failing error/check added to the * IA32/X64 section. */ -static void build_bert_mca_error(struct mca_bank *mci) +static void build_bert_mca_error(struct mca_bank_status *mci) { acpi_generic_error_status_t *status; acpi_hest_generic_data_v300_t *gen_entry; @@ -152,7 +148,8 @@ static const char *const mca_bank_name[] = { void check_mca(void) { int i; - struct mca_bank mci; + struct mca_bank_status mci; + msr_t msr; const unsigned int num_banks = mca_get_bank_count(); if (is_warm_reset()) { @@ -167,18 +164,18 @@ void check_mca(void) printk(BIOS_WARNING, " MC%d_STATUS = %08x_%08x\n", i, mci.sts.hi, mci.sts.lo); - mci.addr = rdmsr(IA32_MC0_ADDR + (i * 4)); + msr = rdmsr(IA32_MC0_ADDR + (i * 4)); printk(BIOS_WARNING, " MC%d_ADDR = %08x_%08x\n", - i, mci.addr.hi, mci.addr.lo); - mci.misc = rdmsr(IA32_MC0_MISC + (i * 4)); + i, msr.hi, msr.lo); + msr = rdmsr(IA32_MC0_MISC + (i * 4)); printk(BIOS_WARNING, " MC%d_MISC = %08x_%08x\n", - i, mci.misc.hi, mci.misc.lo); - mci.ctl = rdmsr(IA32_MC0_CTL + (i * 4)); + i, msr.hi, msr.lo); + msr = rdmsr(IA32_MC0_CTL + (i * 4)); printk(BIOS_WARNING, " MC%d_CTL = %08x_%08x\n", - i, mci.ctl.hi, mci.ctl.lo); - mci.cmask = rdmsr(MC0_CTL_MASK + i); + i, msr.hi, msr.lo); + msr = rdmsr(MC0_CTL_MASK + i); printk(BIOS_WARNING, " MC%d_CTL_MASK = %08x_%08x\n", - i, mci.cmask.hi, mci.cmask.lo); + i, msr.hi, msr.lo); mci.bank = i; if (CONFIG(ACPI_BERT) && mca_valid(mci.sts)) @@ -188,8 +185,8 @@ void check_mca(void) } /* zero the machine check error status registers */ - mci.sts.lo = 0; - mci.sts.hi = 0; + msr.lo = 0; + msr.hi = 0; for (i = 0 ; i < num_banks ; i++) - wrmsr(IA32_MC0_STATUS + (i * 4), mci.sts); + wrmsr(IA32_MC0_STATUS + (i * 4), msr); }