diff --git a/src/soc/intel/common/block/graphics/Kconfig b/src/soc/intel/common/block/graphics/Kconfig
index 4ab92001c3..36cac22ec9 100644
--- a/src/soc/intel/common/block/graphics/Kconfig
+++ b/src/soc/intel/common/block/graphics/Kconfig
@@ -2,3 +2,11 @@ config SOC_INTEL_COMMON_BLOCK_GRAPHICS
 	bool
 	help
 	  Intel Processor common Graphics support
+
+config SKIP_GRAPHICS_ENABLING
+	bool
+	depends on SOC_INTEL_COMMON_BLOCK_GRAPHICS
+	default n
+	help
+	  Skip GT specific programming in coreboot to support
+	  early parts without GT enable.
diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c
index 0fbddf06e9..07090331cb 100644
--- a/src/soc/intel/icelake/graphics.c
+++ b/src/soc/intel/icelake/graphics.c
@@ -34,6 +34,10 @@ void graphics_soc_init(struct device *dev)
 {
 	uint32_t ddi_buf_ctl;
 
+	/* Skip IGD GT programming */
+	if (CONFIG(SKIP_GRAPHICS_ENABLING))
+		return;
+
 	/*
 	 * Enable DDI-A (eDP) 4-lane operation if the link is not up yet.
 	 * This will allow the kernel to use 4-lane eDP links properly